Sorry in advance for a long question. I'm working on designing some pre-amplifiers to amplify signals from a Multi-Wire Proportional Chamber for a nuclear physics experiment. Each signal from these wire chambers is basically a current pulse that deposits a total charge on the order of 10 femtoCoulomb over the span of 10-100ns or so.

The design will be implemented with SMD components on a 6-layer PCB and the trace height above a ground plane will be about 0.08 mm. This is because the pre-amplifiers will be spaced very close to one another, and we want to minimize cross-talk.

We want pulse heights to be proportional to charge deposited and each pulse should decay before the next pulse arrives, so from this I understand that the topology should be some kind of lossy integrator/charge amplifier.

A typical charge amplifier that I've seen all over is roughly this topology. V1, I1, R1, and C1 model the MWPC itself, as the wires are kept at high voltage through a pull-up resistor, and a high voltage decoupling capacitor is needed to protect the amplifier electronics. Let's call this one design 1:

Charge amplifier

As I understand it, this charge amplifier topology effectively eliminates the effects of any R4/C2 because of the virtual ground at the negative input terminal, which is beneficial if C2 is not well-known, such as for a long cable. However, this is not a concern for my application, as the pre-amplifiers are onboard the MWPC detector itself. A rough calculation with a microstrip capacitance calculator gave me about 1 pF of shunt capacitance for the traces of my input line.

However, the capacitor C3 alone sets the charge-to-voltage gain of the integrator, and for something like 10 fC of charge, even a 4 pF capacitance only gives 2.5 mV. It would be nice to have a larger signal, but I am concerned that making the capacitor even smaller than that would mean that parasitic capacitances could heavily change the gain and response of the circuit.

The pre-amplifiers are onboard the PCB of the detector itself, to minimize noise before the signal is amplified, so space limitations make it difficult to fit a second stage of amplification after the first stage. I came up with an inverting and a non-inverting alternative design below.

For the non-inverting amplifier (design 2), C2 would be about ~4 pF (total including the ~1 pF shunt capacitance of the trace) and R1 would be chosen to set the decay time constant, while R4 and R3 would set the extra gain that I was hoping for. C3 is there to account for input offset voltage, and would be large. Non-inverting charge amplifier design

For the inverting amplifier (design 3), C5 would be ~4 pF similarly, but R10 would set the decay time constant through the virtual ground and the R11/R10 ratio would give the extra gain. Inverting charge amplifier design

My main question is: I see that design 1 is often used for this kind of detector, whereas I haven't seen any topologies like designs 2 or 3 used. It seems that designs 2 or 3 can provide better gain without an extra stage. Design 1 can eliminate the effect of the input capacitance, but this seems to be a much more minor concern here, since the amplifiers are onboard, without any long cable connecting them. Am I missing some critical flaw that makes designs 2 or 3 inappropriate for this application, or a significant other benefit of design 1?

One potential issue might be stability. Since the positive input on the inverting design is grounded, design 3 should have only negative feedback and so be stable.

Design 2 doesn't have a grounded positive input, and so a sufficient amount of capacitive coupling between output and input would cause oscillation. Experimenting with this in simulation gives around 0.1 or 1 pF where this starts to become an issue, for a R3/R4 gain of 100 or 10, respectively. However, on the PCB layout I've prepared for design 2, the traces seem to be far enough away from each other to keep the capacitance between them well below this. And in the worst case, I can simply lower the resistor gain to reduce the loop gain and still end up with a higher gain than design 1.

So overall, I'm just trying to find out if there's anything I've missed that can be spotted straight from the topology and design specs, or if I just need to bite the bullet and print design 2 or 3 and see if it works or not.


2 Answers 2


Design 1 holds the voltage on the wire effectively constant. Thus, the capacitance of the wire will not affect the charge to voltage responsivity, and the wire will not crosstalk to other wires in your MWPC electrostatically.

For your other designs, the capacitance of the wire will reduce the responsivity, and the capacitance between wires will cause crosstalk.

  • \$\begingroup\$ That's a good point, I hadn't thought about capacitive coupling between the wires themselves. So that would somewhat affect the precision of the measured position by the wire grid, since the signal would spread into adjacent wires? They're about 16 micron radius with 3 mm spacing in air, so I get a capacitance of ~0.3 pF between adjacent wires. That does seem a little much, since the plan is to have each wire have just 4 pF capacitance to ground. If I go with design 2 or 3, do you think it would be enough to increase the input cap. of each pre-amp and just raise the resistor gain to match? \$\endgroup\$
    – Migue
    Commented Dec 12, 2023 at 2:15
  • 2
    \$\begingroup\$ @Migue If you can tolerate the noise. Adding capacitance to the input of a charge amp makes it noisier. \$\endgroup\$
    – John Doty
    Commented Dec 12, 2023 at 2:35
  • \$\begingroup\$ You're referring to Johnson noise right? Or do other sources of noise also increase with increasing input capacitance? For Johnson noise on caps, it looks like up to even 100 pF keeps the noise below 1 fC, so since we're aiming for ~10 fC charge deposited, that should hopefully be fine. \$\endgroup\$
    – Migue
    Commented Dec 13, 2023 at 5:21
  • 1
    \$\begingroup\$ @Migue The opamp has input voltage noise, and when configured as a CSA, it amplifies it by Cin/Cf (the ratio of input to feedback capacitance). \$\endgroup\$
    – John Doty
    Commented Dec 13, 2023 at 13:33

It seems that, from the point of view of noise immunity, a long cable between the CSA and the pulse shaping circuitry is not any better than a long cable between the detector itself and the entire front-end electronics, and you have to re-design your detector PCB (that with onboard preamps) or even resort to use of integrated circuits in your design.

As your design 1 circuit is quite unspecific (and I have no personal experience with MWPC DAQ circuitry design), I can only guess whether the reference to essentials of front-end electronics and signal processing for radiation detectors is what you need to proceed with your design task. Any way, there are not many questions on electronics.SE about radiation detectors (in fact, I've seen only one prior to yours), so the reference can be useful for the community to get a grasp on radiation detector frontends and consequently may help this question invite useful advice on implementation details. All in all, charge sensitive amplifiers, signal conditioning, interference and ground loops are generic concepts.

Please turn your attention to an "application note" from the manufacturer of charge sensitive preamplifiers and shaping amplifiers Charge sensitive preamplifiers explained; in particular, to the chapter written by H. Spieler of Lawrence Berkeley Laboratory: Front-End Electronics and Signal Processing (http://www-physics.lbl.gov/~spieler/ICFA_Morelia/text/Front_End_Electronics.pdf). For example, an exerpt from H. Spieler's article (above Figure 11, page 10 of the text)

the input impedance of the amplifier is low compared to the inter-strip impedance \$1/ωC_{SS} \approx τ_i/C_{SS}\$ practically all of the charge will flow into the amplifier, as current seeks the path of least impedance, and the neighbors will show only a small signal.

deciphers the first paragraph of the other answer.

Sections on Pulse Shaping, Noise Analysis, and Interference and Pickup are very instructive reading for circuit designers in general.

  • \$\begingroup\$ Since capacitance on its input increases the noise gain of a CSA, a long cable may be undesirable. If your detector is a big fat PIN with hundreds of pF of capacitance you might not care too much. However, for a low capacitance MWPC you'd usually like to work with the lowest gas gain you need to overcome your CSA noise, so you'd like to keep that to a minimum. \$\endgroup\$
    – John Doty
    Commented Dec 12, 2023 at 15:01
  • \$\begingroup\$ It is exactly what is written in H. Spieler 's article! Regardless to where you have learned the facts you reiterate in your comment, has it come from Spieler's article or from some other source, long cables can hardly be tolerated, and I believe it goes without saying, at least for you and the OP. Or are you in doubt? Then please say so one more time. Remember what the Captain said in Lewis Carroll's The Hunting of the Snark "What I tell you three times is true!" \$\endgroup\$
    – V.V.T
    Commented Dec 13, 2023 at 3:19
  • \$\begingroup\$ For your first paragraph, I had thought that since the pre-amplifier/CSA increases the signal power by quite a bit, that reduces the effect of any further noise sources down the line, which could be pretty big in this experiment in particular, since there's a lot of transient B fields etc. At any rate, the designs do have some pulse shaping capability, as each one has at least two poles, so the idea was to connect the output straight to DAQ. Also, thank you for the sources to check out. \$\endgroup\$
    – Migue
    Commented Dec 13, 2023 at 5:19
  • \$\begingroup\$ From your question post I gather that your concern is about a possibly low level of conditioned signal output from CSA with reasonable feedback capacitance value, which ruins SNR in your noise environment, aggravated by technical inability to squeeze a second amplification stage. Maybe you should consider differential signaling, shielding signal cables, and using high CMRR diff amps at the receiver end. Can only "reassure" you with a quote from Helmuth Spieler's article: \$\endgroup\$
    – V.V.T
    Commented Dec 13, 2023 at 6:47
  • \$\begingroup\$ paying attention to signal paths and potential references early on is much easier than attempting to correct a poor design after it’s done. Troubleshooting is exacerbated by the fact that current paths interact, so doing the “wrong” thing sometimes brings improvement. Furthermore, only one mistake can ruin system performance, so if this has been designed into the system from the outset, one is left with compromises. Nevertheless, although this area is rife with myths, basic physics still applies. \$\endgroup\$
    – V.V.T
    Commented Dec 13, 2023 at 6:48

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