# Common mode voltage with configurations of Opamp

With this diagram, the article states "Because of feedback applied externally between the output and the summing junction, the voltage on the “–” input is forced to be the same as that on the “+” input voltage. Therefore, the op-amp ideally will have zero volts across its input terminals. As a result, the voltage at the op-amp output must equal VCM, for zero volts differential input." I don't understand how the output happened to equal the common-mode voltage. The output should equal to zero, as Vin is zero. Do I miss something here?

• V+ must be connected to the reference terminal. Dec 14, 2023 at 18:04
• @Franc could you please elaborate? You mean the transfer function is not the same anymore when the inputs are connected? Dec 14, 2023 at 18:07

Op-amps absolutely can cancel out common mode voltage.

Instrumentation amps are not the same elements as op-amps. In fact, they are more like a circuit with tow amplification stages made out of three (or two, in some cases) op amps.

The second stage of an inamp is a single sided difference amplifier, using matched resistors.

If you build an inamp out of op-amps, the common mode rejection ratio will be a function of how well the resistors on the output stage are matched. In an IC implementation of an inamp, the resistors are precision matched through fabrication techniques.

So, the CMRR of a single-IC in-amp is better than what you can build yourself out of op amps, but the latter can be fairly good with care and/or trimming.

• You meant in-amp can cancel out, not op-amp? I am a bit confused, as this is opposite to what the article said. Dec 14, 2023 at 18:03
• How does the output equal to Vcm? Dec 14, 2023 at 18:04
• @TSLee-- I didn't say that every op amp circuit you can build rejects common mode voltage. Apples need to compare to apples. A typical single op-amp difference amp can have a fine common mode rejection ratio. Dec 14, 2023 at 19:46

In general the differential voltage gain Ad, is of the order of 10^5, see for example uA741 or TL08. This causes the CMRR to tend towards infinity and the common mode gain to zero as can be deduced from what is shown in the following photos:

• is it because of the phase difference between V+ and V- at the output that changes the sign to negative in the equation of the Superposition principle? Dec 28, 2023 at 8:07

In a real circuit there must be a small difference between the op amp's inputs but in the shown circuit the word "ideally" is used so we are able to assume that the op amp works properly when both the op amps inputs are at exactly the same voltage.

With Vin oscillating about the Vcm level, both of the op amps inputs oscillate about the Vcm level as does the output. Consider what the inputs do and what the output does for positive and negative going excursions of Vin when assuming that the op amp's inputs always remain at the same voltage as each other.

In a situation where Vin is assumed to be zero volts then both of the op amp's inputs and Vout all sit stationary at Vcm.