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I am currently working with RFSoC 4x2 boards to implement a network of SDRs and require synchronization across multiple boards to a time reference. I plan to utilize the pulse-per-second (PPS) signal for synchronization purposes. According to the datasheet for the RFSoC board:

The RFSoC board contains a PPS interface that can be used to capture PPS radio beacon signals. PPS signals are typically very accurate and stable, and are broadcast by various devices to create a wireless synchronization pulse across a relatively wide area. PPS receivers can use the PPS pulse to minimize the effect of clock drift over time, and to maintain synchronization with other receivers. The RFSoC board provides two PPS signals derived from a comparator and a Schmidt trigger, and an 8-bit value SPI ADC. Pin connections are shown in Appendix A.

I have also attached the schematic of the PPS signal conditioning circuit for reference. My questions are as follows:

What is the purpose of each of the three components in the circuit - the Schmitt trigger, ADC, and comparator? Which signal output should I utilize to access the PPS signal on the FPGA?

I appreciate any insights or guidance on how to proceed with accessing the PPS signal.

PPS signal conditioning

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  • \$\begingroup\$ Since it's a development board, I would guess they give you various ways of processing the input signal depending on what you want to do, and it's up to you to choose. Can't be sure without reading the manual. For example the comparator would work with a tiny input signal while the schmitt trigger needs several volts, and I have no idea about the ADC. But if you know the voltage levels on your PPS signal, you should be able to check which input circuit will work best. \$\endgroup\$
    – bobflux
    Commented Jan 5 at 21:18
  • \$\begingroup\$ This all comes down to (sometimes I get a bit tired of saying this), but what are your requirements? To what accuracy do all the SDRs have to be synchronized? There's a big difference between 1 s, 1 ms and 1 us. \$\endgroup\$
    – SteveSh
    Commented Jan 5 at 21:38
  • \$\begingroup\$ And is latency a concern? I have not looked at the data sheets for the parts on the board, but I would expect the Schmitt trigger path to have the lowest latency, followed by the comparator path, and finally the ADC path. \$\endgroup\$
    – SteveSh
    Commented Jan 5 at 21:42

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Schmitt Trigger: Noise reduction and filtering

ADC: Synchronization or measuring signal quality

Comparator: Balance checking that makes sure the signal does exceed a particular tolerance

Your question about which signal to use? That depends on your application from the development board. This development board is likely giving you a choice or multiple choices to give control over how you want to handle the reception of transmitted signal.

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