In the first stage the signal is converted to single-ended, and it is amplified using a digital potentiometer in the second stage to be able to change the gain with a microcontroller.
In the last stage I have converted the signal back to differential again.
Thd ADC range is 0-3.3 V and the max. sampling frequency is 5.6 MHz, or 3.3 MHz will be used.
The reason for the differential input is because it has 6 to 8 dB better SNR performance. The signal frequency range of interest is 1 kHz to 1.5 MHz or so.
If you can answer each question specifically it would be great.
My questions are:
Is this schematic correct in the case of cascade connections and especially the part where the signal converted back to differential again (the last stage)? The gain is adjusted in the second stage, so the first and last stages are just for proper conversion. Please correct any wrong resistance value I selected, if any.
What should be the values of R12 and R14? One reference design uses 1 kΩ, another one uses 10 kΩ. Is it important?
Does R10 (10 kΩ) have to be the same as R13 (1 kΩ)? Another way of asking is, is the value of R10 important in this conversion?
Do I need R9 and R19 before the DC bias voltage connection?
SAR ADC recommends an RC filter at the input for filtering and capacitance recharging, so I have placed 20 Ω and 2.7 nF. Is this correct?
IFF+
andIFF–
come from a capacitively coupled source? \$\endgroup\$