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When analyzing the transitories associated with switching in semiconductor devices, in textbook treatments one often sees the time dependence considered by including (potentially nonlinear) capacitors in the device. My question here is about trying to understand what is tacit in this, and why we can do this rather than having to solve the full equation set associated with carrier transport in the semiconductor in order to, eventually, determine \$i(t)\$ (defined as the relevant instantaneous current in the given device).

My suspicion is that this approximation works to the extent that the device "responds much more quickly" than the signal of interest driving the device changes. That is, if we are in a quasistatic limit such that at each point during the transition the semiconductor is in a new electrostatic situation, then we can use this picture of capacitors rather than going all the way back to the equations.

Is this suspicion correct? The reason I am unsure is that, in the treatments I have seen of devices there seems to be the suggestion that we can use this capacitor picture up to very high frequencies (in terms of the frequency content of the signal driving the device). For example, let's consider a modern digital system with a gate which is such that it is driven by a signal with an edge rate of 10 ps (I don't even think is that aggressive). We thus have the voltages throughout this structure changing on the order of ps which I suspect is on the order of the relevant recombination times (by recombination time I mean whatever is the fastest mechanism for getting carriers to where they need to be -- this might be e.g. a transit time to a source of carriers) of carriers. Why then is this quasistatic picture still appropriate?


As a specific example of my general discussion above: For pn junction, we consider the charge which must flow from the surrounding battery in order to satisfy the electrostatics at each instant. Thus, \$i_e(t) = dq(t)/dt\$ where \$q(t)\$ depends on \$v(t)\$ and this gives the contribution to the total current associated with the switching (the nonlinear capacitors in general) (it of course adds with what I’ll call \$i_o(t)\$ which is the pn junction current from the steady state case for that given value of \$v(t)\$: \$i(t) = i_e + i_o\$). This \$q(t)\$ is the aforementioned charge associated with the nonlinear capacitor used to model the device.

But it seems to me that we are tacitly saying that the rate of change of the driving \$v(t)\$ must be slow enough so that at each instant the electrostatics are indeed fixed. In a sense, the limit of our analysis is that the process is quasistatic with respect to our pn junction, but I am struggling to understand with respect to what semiconductor system time constant \$\tau_i\$ the characteristic time of the driving voltage \$T\$ must be large. As I wrote above, I suspect it's whatever the fastest recombination time is. That is, I imagine that for small enough \$T\$ (so that this \$T\$ gets to be on the order of the shortest recombination time), we eventually have to go back to the fully time-dependent equations governing carrier transport etc.

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  • \$\begingroup\$ Given that you mentioned digital systems, are you specifically interested in CMOS circuits? \$\endgroup\$ Jan 18 at 16:14
  • \$\begingroup\$ I would say that is an area of interest for me but in the end my interest is understanding the physics/the nature of this widely made approximation. Why can we treat these devices as (having) nonlinear capacitors rather than needing to actually go back and solve the full equation set once things start changing really quickly? @JonathanS. \$\endgroup\$
    – EE18
    Jan 18 at 17:42

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The minority carrier lifetime in modern digital CMOS devices is actually much longer than the cycle time of the digital circuits.

From The Minority Carrier Lifetime in Silicon Wafer, on Science Shot:

The lifetime is quite unpredictable and difficult to control. It can vary by several orders of magnitude, from approximately 1 ns to 1 ms in common silicon solar cell materials. The highest value ever measured is 32ms, for undoped silicon, and the lowest is 1 ns, for heavily doped silicon.

Given that CMOS devices can achieve gate propagation delay times on the order of 10 ps and lower, we can infer that carriers do not need to recombine for a MOSFET to stop conducting. Instead, it is sufficient for those carriers to be swept out of the device's active area by electrostatic forces. This process is only limited by the size of the channel and the velocity of the carriers.

From Introduction to Power MOSFETs and Their Applications by National Semiconductor:

A major advantage of the power MOSFET is its very fast switching speeds. The drain current is strictly proportional to gate voltage so that the theoretically perfect device could switch in 50 ps–200 ps, the time it takes the carriers to flow from source to drain.

Note that this quote talks about power MOSFETs, which typically have much longer channels and lower carrier velocity than digital CMOS devices, hence the slow switching time of 50ps.

The same applies to PN junctions. A switching diode, for example, will conduct for some time after the forward voltage across it has been removed, which is called reverse recovery. During this time, a reverse current flows through the diode. The duration of reverse recovery isn't fixed, though, but rather depends on how fast the external circuitry attached to the diode can remove the reverse recovery charge from the junction. The higher the reverse current, the faster the carriers making up that charge are swept out of the junction, speeding up the turn-off process.

Similarly, if you want to turn a BJT off faster, you can short its base directly to ground (or otherwise inject a negative current into the base) to actively evacuate carriers from the base.

As a rough estimate, let's consider a 20nm long N-MOSFET channel in velocity saturation with electrons going through it at approximately 10^5 m/s (number from Wikipedia). That means an electron travels through the channel in about 0.2 ps. Charging and discharging the MOSFET gate at a rate where this becomes significant will be quite a challenge. Additionally, even if you could change the potential on the gate fast enough for this carrier evacuation time to matter, you could still describe the process as a capacitor being charged and discharged by a constant current source due to velocity saturation.

In short: You don't need to wait for carriers to recombine and disappear to turn a semiconductor device off - instead, you can shove the carriers somewhere else where they don't cause any trouble. The electrostatics within the semiconductor can be considered "fixed" because the signals are much faster than the natural recombination of carriers.

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  • \$\begingroup\$ Thank you for this very helpful answer. I should have clarified (and will do so now) that by "recombination time" above I do mean generalized recombination time, including the sort of transit time that you're describing here. Thus I think my question still stands (though please tell me if not). Are the fastest generalized recombination times (e.g. the shoving of carriers out of a diode by making its QNRs short so that the contacts are "close") really that short that we can use the aforementioned quasistatic approximation? \$\endgroup\$
    – EE18
    Jan 18 at 17:40
  • \$\begingroup\$ @EE18 I've updated the answer accordingly. In short, things still "look like" capacitors being charged and discharged by constant current sources due to velocity saturation. \$\endgroup\$ Jan 18 at 19:22
  • \$\begingroup\$ If I am understanding you correctly, the resolution to my issue is essentially that the fastest times for getting carriers where they need to be to satisfy the electrostatics is still generally faster (tenths of picoseconds) than any edge rates used in modern devices (at fastest, maybe 5 ps). Is that right? \$\endgroup\$
    – EE18
    Jan 18 at 19:56
  • \$\begingroup\$ I've accepted but would appreciate comment on one more thing you say: "Additionally, even if you could change the potential on the gate fast enough for this carrier evacuation time to matter, you could still describe the process as a capacitor being charged and discharged by a constant current source due to velocity saturation." Why does this matter? If we could have signals varying on the tenths of picoseconds scale then why does velocity saturation matter? \$\endgroup\$
    – EE18
    Jan 18 at 19:57
  • \$\begingroup\$ @EE18 The voltage might vary that quickly, but moving actual electrons around can't go any faster than the saturation velocity. In the end, what matters is the following: When turning off, the MOSFET's channel surface starts out with a certain amount of charge. Then "stuff" happens, and in the end, there's no (or almost no) charge anymore in a new steady state. This means that you can fundamentally describe it as a capacitor plate. The "stuff" that happens in-between is nonlinear, but it still moves electrons away at a limited rate, so it can be described as a current-limited cap discharge. \$\endgroup\$ Jan 19 at 21:35

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