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I am designing a 4 layer PCB. For high currents in the inner layers, should I use polygons or traces? Trace width can be defined by the current requirement from the trace width calculator but what about polygons? When to use polygons and how to decide it's width/area?

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When to use polygons

Use a polygon when its easier to do it that way. For example, when other features (vias, other traces, etc) prevent fitting a trace of the required width.

and how to decide it's width/area?

As a general rule you should try to make the width at least the same as what you calculated with the trace width calculator. However you can allow short segments to be narrower because heat will propagate lengthwise to other segments that are wider.

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  • \$\begingroup\$ For trace widths upto 6cms, how should I plan the polygon? \$\endgroup\$
    – Andr7
    Commented Jan 23 at 6:25
  • \$\begingroup\$ @Andr7, plan it so that it connects from where the current comes from to where it has to go to, and try to make it 6 cm wide. If you need to use vias to connect from or to the polygon, consider using several vias in parallel to handle the kind of currents that require a 6 cm trace without excessive voltage drop. \$\endgroup\$
    – The Photon
    Commented Jan 23 at 6:26
  • \$\begingroup\$ Can I do inner layers as 2 oz and top -bottom and 1 oz to decrease the widths? It is difficult to make wide polygons with multiple nets on the same layer \$\endgroup\$
    – Andr7
    Commented Jan 23 at 6:38
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    \$\begingroup\$ @Andr7, outer layer typically comes out 1.5 oz due to plating added when plating vias. There shouldn't be any problem with using 2 oz on inner layers. Note inner layers typically need to be thicker to carry the same current due to not being exposed to air. \$\endgroup\$
    – The Photon
    Commented Jan 23 at 6:50

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