I have come across this on an (Altera) FPGAs that make use of high speed protocols but don't know what it does.
A transceiver is a combination of analog and digital blocks. The analog block (the PMA) can have sub blocks such as clock recovery unit, transmitter PLL, bit serializer and de-serializer and the digital part consist of one of all of the following blocks, data-aligner, phase-compensation and in many cases something like 8b/10b decoder and encoder.
To simplify the whole thing, when you connect 2 devices through high speed serial interface, you need create some kind of control to make sure your data transfers correctly between these devices.
This gets even more complicated when you have multiple lines of data running at multi Gigabits/second.
The transceiver 'aligns' those lines and takes care of the electrical issues between those devices. And at the same time, it makes sure that faulty data is detected and in some case it is fixed before sending it to the higher layer of the communication protocol.
You can create most of the digital parts in HDL, but many modern FPGAs have those implemented in HW already to make it easier for people to use. Both Altera and Xilinx have some wizards to generate a wrapper for the type of serial interface you want to access.
You can find some more in dept information about them on these pages:
- Altera Transceiver Overview: Stratix IV and HardCopy IV
- Wikipedia - Multi-gigabit transceiver
- Xilinx 7 Series FPGA Transceivers Wizard
You can also read this interesting short booklet from Xilinx : High-Speed Serial I/O Made Simple
There are some cases, when the transceiver is used for application, that can work in various modes or speeds. E.g. SDI (http://en.wikipedia.org/wiki/Serial_digital_interface). If You use SD quality video signal, the data rate is 270Mbps, if You connect HD video HD-SDI to the same interface, then the data rate is 1485Mbps. Same for other SDI standards. Now the deserializer does deserialization of the data... From SD-SDI it extracts 27Mhz clock and 10 bits of data. From HD-SDI it extracts 74MHz clock and 20 bits of data. Because of internal PLL clock difference and data bus difference, You need to reconfigure transceiver for proper clock recover, because the clock has to be recovered from the same wire as data.
A "transceiver" in this context is a hardware block that converts from a high-speed serial interface (too fast for normal FPGA logic and IO to deal with directly) to an internal parallel interface.
The transceivers on a FPGA are usually highly configurable supporting many different speeds and protocols. In simple systems you can just configure the transceiver statically by passing settings to the transceiver IP block which the synthesis tool then turns into configuration settings in your programming file.
But sometimes you want to change the settings of the transceiver without reprogramming the FPGA. The transceiver reconfiguration controller block gives you an interface to reprogram the transceiver from within your logic system.
The transceiver reconfiguration controllers are not very will documented. As far as I understand it, the controller has a couple of main purposes. The thing to keep in mind is that the high speed transceivers are very complex mixed signal blocks. They have a very large array of (mostly undocumented, at least publicly) configuration and calibration settings. Some of these are straightforward, like PLL divider settings and line coding settings. Many of these settings are specific to the protocol in use and need to be reloaded if the protocol needs to be changed on the fly. The parameters are usually exposed through a memory interface, so using a small soft core CPU makes sense to load these. However, other settings are a bit more low level. Things like bias voltages and currents for various analog blocks and other internal transceiver components. Things that need to be adjusted over time to compensate for temperature and voltage variations and manufacturing differences between parts to keep the transceiver operating correctly. The firmware on the reconfiguration controller also manages these settings continuously, which is why you need one even if you don't intend to switch high level settings on the fly.