Flyback converter sense resistor placement and wiring

Question

I am designing my first ever Flyback converter. The Fsw = 100kHz. Peak primary current = 3.26A. The converter has to fit in a very small space, so I'm making a lot of compromises. For example, I could place the 'sense' resistor relatively far away from the IC. How much of a problem is this? I used the 'kelvin' method for the wiring. And I could place the snubber network on the bottom side. My biggest problem is with the sense wiring, I'm afraid of malfunction. What are your suggestions?

Here some pictures of the design:

TOP:

BOTTOM: TOP: BOTTOM:

EDIT:

I redesigned the layout. The N-FET is on the bottom side, close to the IC, and i added a gate pull down resistor to it.The sense line has become shorter.

Answer 1

The general rule for routing switching converters is to keep short connections and reduce areas in which high current circulates. The sense resistance will be inserted in a loop comprising the input capacitor, the transformer, the power switch and the sense resistance which is returning to the input capacitor. That loop has to be kept as short and compact as possible. See the illustration below which I drew a while ago while designing integrated controllers:

The sense signal, in essence, is of low-impedance but adding an \$RC\$ filter - which is recommended anyway - like \$R_{47}C_{34}\$, can deteriorate the path. These elements must be routed very close to the controller with \$C_{34}\$ between the CS and GND pins of the controller. \$R_{47}\$ is next to it. The adopted values are wrong, usually \$R_{47}\$ should around 470 Ohms for instance and \$C_{34}\$ 100-220 pF, especially if the IC includes a leading-edge blanking (LEB) circuit. On the other hand, \$R_{43}\$ must be wired close to the MOSFET gate and I recommend you add a 22-kOhm resistance between the gate and source of the MOSFET. This is for safety in case there is a bad solder joint on the driver, you don't want to have the gate left floating.

Regarding the feedback, I can see they use an operational transconductance amplifier (OTA) but you can't really disable it because if you ground the FB pin, some comparator may trip a protection. You thus going to inject current across the 4.2-kOhm resistance as shown below:

This is quite an uncommon scheme as they seem to close the OTA loop as with an op-amp to make it a simple inverting follower: when the emitter of the optocoupler goes high, the OTA output will go down, reducing the duty ratio. Given the low current at play here, you see rather high-value resistances. Make sure to keep connections around these components short and place them close to the control circuit.

As a final remark, since it is your first flyback circuit, why not trying a good old UC384x that everybody knows and which is a robust controller. If you want to read more about the flyback converter, you can read my APEC 2011 seminar that you can download from my webpage. Good luck with your experiments!

Answer 2

The sense trace is probably okay due to the attached RC filter (R47, C34), which suppresses any high-frequency transients introduced by the long traces.

Unfortunately, you have an even bigger problem in this layout: The gate drive trace and its associated return path. When the driver IC switches your primary-side MOSFET, multiple amps will flow through the gate trace and back through the equally long GND trace / ground plane. The current can be up to 5A during MOSFET turn-off (5V on the gate, about 1 Ohm resistance in the MOSFET driver).

Just let that sink in: You're putting 5A through a tiny signal trace while your massive primary trace only carries a bit over 3A. That's absolutely not going to go well.

The datasheet of the LT8357 has layout recommendations on page 26.

There should be an unbroken ground plane between the controller IC and the MOSFET's source terminal, with almost no distance between them (a few millimeters at most). The gate drive trace should also be much, much thicker (at least 1mm), and equally short (millimeters). The IC's pinout seems to be specifically designed to allow for placement of the MOSFET and sense resistor directly next to it without trace routing conflicts.

In your current layout, the gate drive trace is essentially forming an LC resonator together with the gate capacitance.