0
\$\begingroup\$

I'm looking turn on the power of an LCD screen from a Pi Pico with a short time delay (50-100ms) after the Pico is plugged in. I want to power the screen with VCC from the Pico (5V) and use a signal coming from the 3.3V to power the time delay.

I looked at another project that uses a similar screen and uses a GPIO signal to turn it on and off, but I need some help understanding how the circuit works. The signal comes from LCD_EN through a BRT, which has it's collector connected to the gate of a P-channel mosfet. As I understand it, a negative voltage needs to be applied to the gate of the Mosfet to have it "on" and powering the LCD.

enter image description here

I'm struggling to understand how the BRT provides this negative voltage when LCD_EN is providing a signal. The BRT has R1 = 4.7k and R2 = 47k, when I simulate the circuit I see the output is 0V when I don't have an input signal (LCD_EN). I must be misunderstanding something here.

enter image description here

Onto the second part of my question, assuming the above circuit actually does work as intended, can I simply put an RC delay circuit in front of the BRT and achieve this short time delay? I would grab 3v3 from the 3v3 pin on the Pi Pico:

enter image description here

\$\endgroup\$
2
  • \$\begingroup\$ What does BRT stand for? Do you mean BJT? \$\endgroup\$
    – Justme
    Commented Feb 1 at 19:59
  • \$\begingroup\$ @Justme A BRT is a transistor with bias resisters integrated. \$\endgroup\$ Commented Feb 1 at 20:06

3 Answers 3

2
\$\begingroup\$

Schematic #3 should do what you want with one addition. You need to add a resistor from the Q1 gate to its source. This assures a rapid and complete turn-off when Q2 stops conducting. This can be a fairly large value - anything in the 10 K to 100K range will work. Without this resistor, the Q1 gate is floating when Q2 is off. In this state, the FET's conduction is undefined. Also, the part is susceptible to external noise and transient damage.

Also, be sure to check the datasheet for Q1 to make sure it will be "on" with only 4.9 V Vgs.

\$\endgroup\$
2
  • \$\begingroup\$ thanks, I already have 5.1k and 75k resistors in my BOM, should I just use 2 5.1k or maybe just throw a 75k on there? I want to avoid adding too many individual components to my design. \$\endgroup\$ Commented Feb 1 at 21:35
  • \$\begingroup\$ 75 K will be fine; there is almost zero current needed. Gold star for BOM management during the design phase. \$\endgroup\$
    – AnalogKid
    Commented Feb 2 at 13:50
2
\$\begingroup\$

Your simulated circuit "doesn't work" because all your nodes are at zero volts - you don't have a potential difference across any component, therefore the simulation is behaving exactly as expected.

Put a 10k resistor between pins 1 and 2 of your MOSFET.

Yes, your RC delay circuit could work. You might have to twiddle with the values to get the timing right. 220k is probably too high. Start with 10k and 4.7uF and work the capacitance down from there. Also, remove the 2 resistors you have (4k7 and 47k)

Update based on new information:

schematic

simulate this circuit – Schematic created using CircuitLab

This should get you in the ball park. You still may have to mod some values; these values are based on your BOM.

\$\endgroup\$
8
  • \$\begingroup\$ The 2 resistors are to simulate the BRT. I checked the circuit with 3v3 in to the 4.7k and it still doesn't work as intended: imgur.com/a/TOf2pDK I guess maybe Im not simulating it correctly, I was just trying to use it to understand more visually what is going on with the BRT here. I already have 100nF caps in my BOM for this project so I figured it would be easiest to use those, I also read somewhere it's more desirable to have a smaller capacitance value. \$\endgroup\$ Commented Feb 1 at 21:28
  • \$\begingroup\$ @printsmith3d You are still forgetting a resistor between gate and source. When the bipolar (BRT?) transistor is off, the gate is floating. Do have any bigger caps on your BOM? Post a link that said it's better to have a smaller cap for time delays. \$\endgroup\$
    – MOSFET
    Commented Feb 1 at 21:39
  • \$\begingroup\$ I have 5.1k and 75k currently on the BOM. For caps I have 100uF tantalum and 100nF. It was just someone from a discord channel who said they usually do smaller cap... I don't mind adding more parts to my BOM so it's fine, I was just trying to keep it as simple as I could. \$\endgroup\$ Commented Feb 1 at 22:05
  • \$\begingroup\$ This is my final circuit then with the added resistor on Q1: imgur.com/oDqehSg If I'm putting a 10k between the gate and source anyways might as well use it for the timer delay as well. \$\endgroup\$ Commented Feb 1 at 22:14
  • \$\begingroup\$ @printsmith3d I provided an update based on new constraints. \$\endgroup\$
    – MOSFET
    Commented Feb 1 at 22:34
0
\$\begingroup\$

The FET does not need "negative" voltage, in respect to ground and the BJT does not provide "negative" voltages, in respect to ground.

By providing 0V to FET gate, by turning on the BJT, it means that FET Vs=5V and Vg=0V, so for the FET, Vgs=Vg-Vs=0-5=-5V, so there will be negative Vgs just like there should. So, gate is negative, but in respect to source, not negative in respect to ground.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service and acknowledge you have read our privacy policy.

Not the answer you're looking for? Browse other questions tagged or ask your own question.