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I need to convert a bipolar voltage to a frequency. Say -10 to +10V for the example. For the context this voltage is the error signal from an analog feedback loop. I have a schematics that works well but I think needs too many components.

Refer to the schematics below for he description of the operating principle I tested. Since the zero input voltage has no meaning in terms of frequency, I adopted a single integrator which can rest at zero when the input signal is near zero. When the input signal voltage is positive, a linear decreasing output is produced at the integrator AO1 and when it reaches a given threshold say -10V, then it triggers the -10V comparators CMP4 and sets the corresponding NO3-NOR4 RS flip-flop then forcing the integrator to ramp up (with the controlled analog switch connected to -10V) until the 0V threshold is reached and detected by the corresponding comparator CMP3 the the RS is reset, and the and the cycle can restart, generating a 0/-10V sawtooth signal at the integrator output. Of course the behavior is symmetrical for a positive signal with the upper par of the circuit (CMP1-CMP2) and RS (NOR1-NOR2).

When the signal input is near zero, the integrator output bounces slowly between the + and -10V boundary, being recentered to zero every time the boundary is crossed. The result is an alternating sequence of positive and negative output pulses, keeping an hypothetic output counter at the same count value +/-1 unit.

schematic

simulate this circuit – Schematic created using CircuitLab

This schematics can be made with a single op amp, a quad comparator and a single quad NOR gates package and a pair of analog switches or transistors so a total of 4 IC's.

I do not guarantee the accuracy of the schematics, especially the signs of the comparators inputs and choice of NOR outputs, since I have done and tested it 30 years ago, and I draw it from memory but it works.

Now the question: does anyone know of a commercial IC (or a pair) that can do the same job? Or an application note for standard VCF chips like VCF32 or similar. My goal is to lower the component count of course!

Thanks!

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  • \$\begingroup\$ V4 is upside down \$\endgroup\$
    – jsotola
    Commented Feb 4 at 19:23
  • \$\begingroup\$ I don't think so because its value is negative. \$\endgroup\$ Commented Feb 4 at 19:26
  • \$\begingroup\$ So if I understand correctly, the point of generating the frequency is to increment/decrement the counter according to the -10/+10V input, in other words the counter acts like a digital integrator for the input voltage, right? \$\endgroup\$
    – bobflux
    Commented Feb 4 at 21:39
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    \$\begingroup\$ Analog Devices has the AD652S, AD7741 and Ad654 ICs for example. Search their website to find datasheets and application notes. \$\endgroup\$
    – Barry
    Commented Feb 4 at 23:09
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    \$\begingroup\$ Why not use a microcontroller, use the ADC to acquire the input voltage, and do the integration digitally? \$\endgroup\$
    – bobflux
    Commented Feb 4 at 23:12

3 Answers 3

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This can be done with variable triangle oscillator. Triangle is made by charging and discharging the cap with constant current. The control voltage (-10 to + 10V) changes the slope of triangle by changing the capacitor charging current. The triangle peaks stay at the constant voltage level for all frequencies, btw.

There is also possible to hold constant slope of triangle for all frequencies and change the triangle peaks with comparators.

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  • \$\begingroup\$ Thanks Michal, but the circuit does exactly what you describe (except that the waveform is a sawtooth not a triangle) since the input structure is an integrator. My goal is to get (if possible) a commercial chip that performs the same operation with less components, the problem being that the linear part (integrator) is commont to the two section of the circuit: one for "up clock" and one for"down clock". \$\endgroup\$ Commented Feb 5 at 7:23
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Considering the 555 timer contains 90% of those elements, maybe you can shoehorn a couple of them into the design:

schematic

simulate this circuit – Schematic created using CircuitLab

OA2 is part of an inverting amplifier (gain −1), so the lower 555 timer also gets a positive ramp. R6 and R7 limit current through the input protection diodes, protecting the 555 inputs from negative potentials.

The immediate issue with this design is that you don't have control over the lower threshold of the 555 internal comparators. Perhaps you could offset the op-amp output potential by 4V to compensate.

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  • \$\begingroup\$ Clever use of a 555! I am not at ease with the input current (even limited by R6 & R7) but I must admit the idea is interesting. Could reduce the number of IC's by using a 556 and a dual op amp at the input. I wonder if the discharge transistors of the 555 could be used to replace the input switches. Pushing the desigh to a full single supply design (using a Vcc/2 as ezero refernce ?) could be interesting as well. \$\endgroup\$ Commented Feb 5 at 10:12
  • \$\begingroup\$ @ChristianNéel I played with the idea of using the discharge transistors, and I even thought about a single MOSFET to discharge the integrating cap directly, instead of switching in alternative integrator inputs to discharge it. There's an easy way in there somewhere, for sure! \$\endgroup\$ Commented Feb 5 at 12:23
  • \$\begingroup\$ Sure! But in that case discharging +10 or -10 will necessitate differents types of Mosfets, (will be the same for the discharge transistor of 555) so I do not see simple solution except external analog switches. \$\endgroup\$ Commented Feb 5 at 12:33
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Since you said you're using something close to a FPGA...

You could put the NOR gates inside the FPGA.

You could also turn it into a sigma delta ADC. You already have an integrator, its negative input is a virtual ground that can act as summing node, you can use the switches as level shifter, so you need one comparator (FPGA LVDS input) and FPGA logic for the sigma delta stuff. Schematic as illustration.

enter image description here

In this case the counter is incremented or decremented on each clock, according to the output of the comparator.

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  • \$\begingroup\$ thanks! In that case if I can find directly an integrated sigma-delta modulator it can help for my second application. \$\endgroup\$ Commented Feb 5 at 12:29
  • \$\begingroup\$ Yes what your circuit does is like a sigma delta ADC with the output filter replaced by a counter. In fact... you could use a one-chip sigma delta ADC, there are plenty available with super high accuracy and simple interfaces like SPI... Or a one chip modulator like AMC1035. Or do it with the FPGA. \$\endgroup\$
    – bobflux
    Commented Feb 5 at 14:29
  • \$\begingroup\$ thanks for the tip! I'll have a look on AMC1035. \$\endgroup\$ Commented Feb 6 at 15:33
  • \$\begingroup\$ Isolated analog measurements are complicated, a method is to use a sigma delta converter to turn the analog value into a bitstream and run it through an optocoupler. Therefore I recommend shopping in the "isolation amplifier" category. In the ADC category, some of the sigma delta ADCs may have an option to output the bitstream directly, check the output options ("bitstream" or "PDM pulse density modulation"). Also "ADC special purpose" on digikey. . Under "audio" there's the DSD option, but audio gear doesn't optimize for low offset and you want that, so... meh. \$\endgroup\$
    – bobflux
    Commented Feb 6 at 17:34
  • \$\begingroup\$ Thanks for the hints! \$\endgroup\$ Commented Feb 7 at 19:02

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