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There is a mezzanine connector with many GND pins to be routed.

I am wondering, which arrangement would be more beneficial?

This is 6-layer PCB, red is top layer, next one is GND plane (hidden in picture)

Tracking

Two scenarios here.

Bottom part: individual tracks from each pin to meet in the middle and via to ground plane beneath. Top part: Copper zone with vias to connect to GND.

Is any of these two better, or even, shall I connect each pin individually to GND? Or, expand GND area as much as possible to form massive one, embracing all GND pins if possible?

Please consider soldering issues (thermal reliefs not existing in copper area scenario). It is going to be soldered externally, probably using machines.

P.S. Ground plane available below, as in this picture:
GndAvailable

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    \$\begingroup\$ Do you have reason to suspect that some pins are noisier than others? EMC-wise it seems far-fetched to recommend one solution over the other. What you can't do for the purpose of soldering, is to connect pins/vias directly to a copper pour ground acting as heat sink, with no thermal relief in between. Doing so will create a bad PCB with manufacturing problems, where you end up with cold joints on the ground pins. \$\endgroup\$
    – Lundin
    Commented Feb 6 at 10:28
  • \$\begingroup\$ @Lundin generally I agree, but 6 layer and high density mezzanine connectors are definitely reflow soldering territory, where we don't have to worry about that \$\endgroup\$
    – sina bala
    Commented Feb 6 at 10:34
  • \$\begingroup\$ So many GND, and yet you put none between the pins that could have used it due to their high speed nature! That's honestly a bug. The point of having this many ground connections on a signal connector is not to allow a large DC current to flow, but to have references close to, and as l if at all possible, between high-speed signals. The purpose is to always contain the electric field from a signal pin to the space to gnd, and not to the next signal pin, because that causes crosstalk. Are you free to reorder your pins, so that there's always ground between CAN_Rx/tx, SPI CLK/data, PWM1/2/…? \$\endgroup\$
    – sina bala
    Commented Feb 6 at 10:38
  • \$\begingroup\$ @Lundin not many noisy pins, SPI here being most 'problematic'. I was wondering this massive plane can disturb soldering, even in manufacturing. \$\endgroup\$
    – smajli
    Commented Feb 6 at 10:43
  • \$\begingroup\$ @sinabala Copper pour could still act as a heat sink during reflow. Make it large enough and it won't heat/cool as quickly as the paste itself. \$\endgroup\$
    – Lundin
    Commented Feb 6 at 10:44

1 Answer 1

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The best practice (IMO) is to use a copper pour for GND, with thermal spokes, and plenty of GND Vias to stitch the planes together. GND vias should be reasonably close to the pins. enter image description here

The use of a solid copper pour is only necessary when the current is extremely high, or it's impractical to use spokes. Sometimes there's not enough room to fit spokes in, so a solid pour must be used.
I'd note that you can use a free calculator like saturn's to get an idea of the amount of resistance in a thermal spoke, and it really is quite small. It's only things like ESCs or high power FETs that truly call for solid pours.

Solid pours obviously come at the disagvantage of being very hard to solder manually. This isn't a concern when having the boards reflowed but still they make rework also very difficult. Large ammounts of copper connected directly to pins could also pose problems bu acting as a heatsink and affecting the reflow - though I dont know if there's actually much risk of this in an industrial process.

The manual many wires process is also just a bit of a pain. It would probably work, but I can't see a single reason to prefer it over a pour with spokes.

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