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I am trying to make the design shown below which is basically a shift register: LFSR

When I elaborate this design in Vivado, it shows me the following:

Vivado design

How can I see which flip-flops the inputs and outputs of the XOR gates are connected to? i.e. is there a way to "expand" out the RTL_REG component to look like the first image?

Update: The three dots on the bus do not appear to be there for me when I zoom in: enter image description here

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No! you cannot expand it. Expanding primitives is not supported in Vivado.

But if you are interested in which pin is connected to which flip flop (in the register) here is how you can see it: Three dots will appear on the input bus near the register/flip flop,

Three Dots appear the concatenation

and if you take the cursor to the three dots, or zoom in, You will be able to see the detail of how the input are concatenated to make a single bus that goes to the register.

Close up view

Here it shows that the bus bits 6:0 goes to the 7:1 location of the register. Quick approach, simply the signal that is at the top is LSB.

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