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I have a difficult time with calculations related to a two-stage MOSFET amplifier.

This post is kinda long because I go through my calculations. However, to cut to the chase, I would like to know how to obtain an equation relating \$v_{out}\$ and \$v_{in}\$ for the two-stage amplifier shown in one of the figures below.

My question boils down to: how does one reason about this problem of obtaining the relationship between \$v_{in}\$ and \$v_{out}\$? Does one have to consider all the possible cases of values of the variables involved or is there some trick or insight I am missing?

This question arose while trying to solve a problem in Agarwal's Foundations of Analog and Digital Circuits and not being able to solve it (and there not being any solution manual).

In what follows, I will

  1. Characterize the behavior of the type of single-stage amplifier we will use in the two-stage amplifier.

  2. Consider the two-stage amplifier.

First I characterize a single amplifier, as follows.

Suppose we have an inverting n-channel MOSFET amplifier. The following figure shows the amplifier and its \$v-i\$ characteristic.

enter image description here

As we can see from the characteristic, the amplifier has three modes of operation.

Mode 1

When the input voltage is small enough (that is \$0\leq v_{in}\leq V_T\$), no current flows. The MOSFET behaves like an open circuit and \$v_{out}=V_S\$.

Mode 2

Given an input voltage \$v_{in}>V_T\$, there is an associated saturation current given by

$$i_{DS}=\frac{K}{2}(v_{in}-V_T)^2\tag{1}$$

The actual current must satisfy

$$i_{DS}=\frac{V_S-v_{out}}{R}\tag{2}$$

The lower \$v_{out}\$ the higher the current. However, \$v_{out}\$ cannot go below zero.

The MOSFET allows any current up to the saturation current. Therefore, given \$V_S\$ and \$R\$, if \$\frac{V_S}{R}\$ is smaller than the saturation current, then this will be the current and \$v_{out}=0\$

This happens when

$$\frac{V_S}{R}\leq \frac{K}{2}(v_{in}-V_T)^2\tag{3}$$

which leads to

$$v_{in}\geq V_T + \left (\frac{2V_S}{KR}\right )^{1/2}\tag{4}$$

Intuitively, given \$V_S\$ and \$R\$, we have a current \$\frac{V_S}{R}\$ and for any saturation current larger than this means the MOSFET operates as a short circuit. Such values for saturation current occur when (4) is true.

Mode 3

If $$v_T\leq v_{in}\leq V_T+\left (\frac{2V_S}{KR}\right )^{1/2}\tag{5}$$

then

$$\frac{V_S}{R}\geq \frac{K}{2}(v_{in}-V_T)^2\tag{6}$$

The MOSFET behaves like a current source with current \$\frac{K}{2}(v_{in}-V_T)^2\$.

For equation (6) to balance out we need to have

$$\frac{V_S-v_{out}}{R}= \frac{K}{2}(v_{in}-V_T)^2\tag{6}$$

$$\implies v_{out}=V_S-\frac{KR}{2}(v_{in}-V_T)^2$$

In summary

enter image description here

Next let's cascade two such one-stage amplifiers, as follows

enter image description here

Here are some tables summarizing the behavior of each of the amplifiers.

For the first amplifier

enter image description here

For the second amplifier everything is the same except that instead of \$v_{in}\$ we have \$v_{mid}\$.

enter image description here

How do we derive the relationship between \$v_{in}\$ and \$v_{out}\$?

Here is yet another table trying to relate \$v_{in}\$ to \$v_{out}\$:

enter image description here

As you can see in the rightmost column, I have that \$v_{out}=v_{out}(V_S)\$ when \$v_{in}\in [0,V_T]\$. This input generates \$v_{mid}\$ at its maximum value of \$V_S\$, which then becomes an input for the second amplifier.

However, if we don't know what \$V_S\$ is, how can we know \$v_{out}\$? After all, as far as I can tell, \$V_S\$ can be made as small or as large as we want. \$v_{out}(V_S)\$ could fall in any of the three regions of operation of the second amplifier.

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  • \$\begingroup\$ In practice, what do you want between the two: the static transfer characteristic of the amplifier which is the analytical link between the Vo and the Vi, or do you want the analytical relationship that links the amplified signal with the input signal and that is the voltage gain of the 'amplifier? \$\endgroup\$
    – Franc
    Commented Feb 12 at 18:02
  • \$\begingroup\$ Maybe try to compose the in/out relationship you already found, using the output (y axis) values of your graph as the input of your next stage. Your second stage has the exact same I/O relationship you already found, but it's input is no longer vin, but vmid, or Vout in your graph. \$\endgroup\$ Commented Feb 12 at 20:38
  • \$\begingroup\$ Something like this: pasteboard.co/6ZogeuGoSnWb.jpg \$\endgroup\$ Commented Feb 12 at 20:57
  • \$\begingroup\$ @Franc I believe I am looking for the static transfer characteristic. \$\endgroup\$
    – xoux
    Commented Feb 13 at 1:34
  • \$\begingroup\$ @MikeAnblips That's precisely what I tried to do in the last table. The problem is that as far as I can tell, we need to know the relationship between \$V_S\$ and the interval \$[V_T\,V_T+(2V_S/MR)^{1/2}]\$. There seem to be three cases to consider. \$\endgroup\$
    – xoux
    Commented Feb 13 at 4:56

1 Answer 1

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There are three possible cases.

Case 1: \$V_S\leq V_T\$

enter image description here

Since \$V_{mid}\leq V_S\leq V_T\$ then \$V_{out}\$ is always \$V_S\$. That is, the input voltage to the second amplifier is always less than \$V_T\$ so it always operates as an open circuit.

Case 2: \$V_T\leq V_S\leq V_T+\sqrt{\frac{2V_S}{KR}}\$

enter image description here

When \$v_{in}\$ is below \$V_T\$ then \$v_{mid}\$ is at its highest possible level, \$V_S\$. Thus, \$v_{out}\$ is at its lowest possible level which is \$V_S-\frac{KR}{2}(V_S-V_T)^2\$.

As \$v_{in}\$ keeps going up, \$v_{mid}\$ goes down along the purple saturation portion of the first plot until it reaches \$V_T\$, which happens for \$v_{in}=V_T+\sqrt{\frac{2}{KR}(V_S-V_T)}\$.

For these values of \$v_{in}\$ and \$v_{mid}\$, \$v_{out}\$ traces out the red portion on the first and second graphs.

For \$v_{in}\$ above \$V_T+\sqrt{\frac{2}{KR}(V_S-V_T)}\$, we have \$v_{mid}\$ below \$V_T\$ and so \$v_{out}\$ is \$V_S\$.

This is all shown in the second of the two plots above.

Case 3: \$V_S\geq V_T+\sqrt{\frac{2V_S}{KR}}\$

enter image description here

For \$v_{in}\$ from \$0\$ to \$V_T\$ we have \$v_{mid}=V_S\$ which generates a \$v_{out}\$ of 0.

As we can see from the first plot, any \$v_{mid}\$ above \$V_T+\sqrt{\frac{2V_S}{KR}}\$ generates a \$v_{out}\$ of 0.

As \$v_{in}\$ increases, \$v_{mid}\$ decreases from \$V_S\$ but remains above \$V_T+\sqrt{\frac{2V_S}{KR}}\$ until \$v_{in}=V_T+\sqrt{\frac{2}{KR}(V_S-V_T-\sqrt{\frac{2V_S}{KR}})}\$.

Thus, for this range of \$v_{in}\$ we have \$v_{out}\$ remaining \$0\$.

We can see \$v_{out}\$ for this range of \$v_{in}\$ as the green portions of the two plots below.

As we increase \$v_{in}\$ above \$v_{in}=V_T+\sqrt{\frac{2}{KR}(V_S-V_T-\sqrt{\frac{2V_S}{KR}})}\$, we are on the purple portion first plot below, from \$v_{in}=v_{in}=V_T+\sqrt{\frac{2}{KR}(V_S-V_T-\sqrt{\frac{2V_S}{KR}})}\$ to \$V_T+\sqrt{\frac{2V_S}{KR}}\$.

For these values of \$v_{mid}\$, to visualize what we have for \$v_{out}\$, we are essentially tracing out the purple curve but from the point where \$v_{mid}\$ is \$V_T+\sqrt{\frac{2V_S}{KR}}\$ down to where it reaches \$V_T\$. The latter point is reached when \$v_{in}=V_T+\sqrt{\frac{2}{KR}(V_S-V_T)}\$. For \$v_{in}\$ above this value we have \$v_{mid}\$ below \$V_T\$ and so \$v_{out}=V_S\$.

Here is a numerical example for case 3.

Let \$V_S=15\mathrm{V}, R=\mathrm{15k\Omega}, V_T=\mathrm{1V}\$, and \$K=\mathrm{2\frac{mA}{V^2}}\$.

In terms of what I already drew (which won't be scaled correctly, we have

enter image description here

I've drawn in orange the portion in the first plot that corresponds to both MOSFETs in saturation, which is when the final MOSFET is in saturation.

As we can tell from the numerical values in pink the corresponding range of \$v_{in}\$ is quite narrow between \$1+\sqrt{\frac{13}{15}}\$ and \$1+\sqrt{\frac{14}{15}}\$, that is, between approximately 1.9309 and 1.9660.

Here are the plots using Maple. We can't plot with both axes scaled the same because the plot is too steep.

enter image description here

As we can see, the region of \$v_{in}\$ that corresponds to saturation of the two-stage amplifier is quite small.

The plot of \$v_{out}\$ vs \$v_{in}\$ is

enter image description here

which is extremely steep.

By my calculations, the gain at roughly the midpoint of the range of \$1.9309\leq v_{IN}\leq 1.9660\$, which is about \$1.9485\$, the gain is about 431. This is just the slope of the plot above at \$v_{in}=1.9485\$.

The reason I am doing all these calculations is that I have absolutely no knowledge of amplifiers outside of the context of the book I am reading.

I don't know how many stages an amplifier usually has, or if this interval for \$v_{in}\$ is realistic at all.

Assuming the calculations are correct, I find it amazing that such small-signal amplification is achieved.

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  • \$\begingroup\$ I think there is a possible typo when you state the conditions for case 2) and 3), where you are stating the boundaries of \$V_s\$ in terms of a parameter \$M\$ which - I believe - should be \$K\$ instead. I think you've been /very/ exhaustive in your treatment, personally I would only have considered your case 3) \$\endgroup\$ Commented Feb 13 at 9:31
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    \$\begingroup\$ Indeed the \$M\$ should be a \$K\$. I did get obsessed with the problem a little bit. It just seems that there are so many parameters and it's not easy to tell what's going on without going through an exhaustive analysis at least once like this. \$\endgroup\$
    – xoux
    Commented Feb 13 at 14:37

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