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I'm 14 years old and I am designing a PCB. I would like your advice on making it better or even restart it from scratch (as long as I learn something, I'm OK with it).

It is going to be for an ESP32 hotplate. The input will be between 12-30 V. The circuit is not the final one and I already have lots of improvement for it, but I would still like to have your advice before making the new/final PCB. Also, I know that the placement of the ESP32 is really bad, but I will be fixing this. Also, the MOSFET will not be used anymore in the next PCB and I will use a DC-DC converter.

Here are some pictures and links to the PCB:

Schematics: Schematics

Link to the design (EasyEDA online editor)

Top of the PCB: Top of the PCB

Bottom of the PCB: Bottom of the PCB

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    \$\begingroup\$ I don't see a schematic. I... actually have no clue how you managed to draw all that in their PCB editor, unless there's a schematic completely separate to it, from which it was imported. I'm not sure if I'm just missing something, or should actually be impressed? It looks like there are some things missing from the schematic though. As for the board layout, have you read up on "ground stitching vias"? \$\endgroup\$ Commented Feb 15 at 1:56
  • \$\begingroup\$ For the schematics, I added it in the question. Also, for the ground stitching vias, I normally use them but it seems like I forgot to add them to this PCB. I'll be adding them in the next "version". \$\endgroup\$ Commented Feb 15 at 2:00
  • \$\begingroup\$ I just added the ground stitching vias in the design. \$\endgroup\$ Commented Feb 15 at 2:06
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    \$\begingroup\$ LM7805 will not withstand dropping 30-35V down to 5V for any sort of reasonable current. Even at the conservative estimate of 50mA for the ESP just idling (no radio), you are talking more than 1W of heat being dissipated in a regulator with no real heatsink just for that which is pushing the limit. Add on four neopixels at up to 60mA each and you've hit over 6W = melted regulator. \$\endgroup\$ Commented Feb 15 at 2:12
  • \$\begingroup\$ You've dragged the mosfet gate (pin 4) connection right through the device limiting the device's connection to the ground plane which, for a high power device (N chanel) must be good. If you are using PWM to regulate the power to the heating element, then the 10k mosfet gate resistor is probably too high. \$\endgroup\$
    – 6v6gt
    Commented Feb 15 at 3:39

4 Answers 4

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There are some oddities on the schematic:

  • The power input would most likely benefit from an electrolytic capacitor near the connector. I don't know the ratings here, but I would guess something 100 to 1000µF would do. The reason is, U2/U12 needs more bypass (check the datasheet), and the cable from the power supply can be considered an inductor (maybe ~1µH) which will therefore make a flyback pulse when the heater is turned off. A ceramic capacitor would help, but isn't sufficient: that would just make it an LC resonator, and still the peak voltage can be more than double the input. An electrolytic dampens it entirely, as its ESR dominates (ESR > Zo, where \$Z_0 = \sqrt{\frac{L}{C}}\$ is the characteristic impedance of the resonant circuit).
  • As Tom mentioned, a 7805 probably isn't a great pick here. It's not clear how much current draw there will be (though with LEDs running potentially at full brightness, that will use up 10s of mA quickly), but the voltage range is already a concern, and the power rating is very easily exceeded. There are many other regulators, including switching types, to choose from, though.
  • +5V should not be wired to the USB connector; backfeeding is bad. Or if that's an input, then a wired-OR connection should be used between USB and internal source.
  • Also, is +5V used for anything besides making 3V3 anyway? It's hard to see on a schematic of this layout style (which itself is a valid point, see below).
  • Oh I think these must be a typo; there's VUSB on the CP2102 but it apparently dead-ends there, so the connector seems to be wired wrong. It's also strange that GND port symbols are used there (and on the 2102), but I guess they still connect.
  • Are Neopixels rated for 3.3V operation? Should that not be 5V (plus a level shifter from the ESP)?
  • Why D1 in series to the heating element? If polarity protection, surely U2/U12 should be connected after it as well?
  • Without knowing what else this connects to, I cannot review EMC issues of course, but some general cautions about exposing logic signals on headers seems prudent. If these are local signals within a metal enclosure, say, that's fine; if they're exposed on cables or connectors, they should probably have EMI filtering and ESD protection provided. (The USB connector more or less gets a free pass, as ESD has a hard time striking anything but the shell, which directs it safely into circuit ground plane, around any circuitry.)

General schematic readability:

  • Avoid connecting circuits with net labels/port symbols, it's impossible to follow and basically turns it into a printed netlist -- printed, in that it's graphics, not searchable plaintext. Labels are okay in moderation, but make it obvious what purpose they are for, and where they connect (an outline box and text comment can help, even on single-sheet designs like this).

  • Schematics are a language and form, like any other written medium; study and follow the conventions. Most of all, schematics are drawn for a human audience -- computers don't care; aside from those that use it for data entry, ultimately it's reduced to a netlist, a table of components and connections. As with all media, know and write for the target audience. Even if it's just a few dozen people, like us here.

  • Signals should flow from left to right, and power from top to bottom. There's not a lot of power flow to be worried about here, and special net labels (power symbols) are acceptable means of connecting those, so that leaves signal flow. In particular, the FTDI, ESP32, CP2102 and USB could be arranged more clearly.

  • Avoid overlapping lines and components. In particular, U2, U9, U6-U8 (I think I just make those out?), and many of the net labels around the USB, are not pleasant to look at, hard to read, or actually illegible.

  • There are a number of stray junction dots as well, suggestive of stray overlapping line segments, or pins/ports placed too close together. Which one is the case, varies between EDA tools, which are sometimes janky with moving around components, making and re-making connections, etc.

    Poor tools are no excuse for poor output of course, but it can be that much harder to produce good output with them... I understand the frustration.

Regarding layout:

  • The CP2102 shouldn't be right up on the board edge; allow some GND to pour around it. There appears to be wide open areas on this board, so this is easy to accommodate.
  • In general, add stitching vias periodically around traces, where they cut across pours creating negative space within them; and especially at crossings where the negative spaces overlap and therefore no ground is present (top or bottom) for the image currents following the traces to flow along; and preferably at end points, peninsulas, islands, etc. of the pours. Stitching in wide open areas away from traces/components, isn't very useful (doesn't make things worse, but also provides very little value); prioritize near components, especially near power pins, bypass caps, etc.

Some highlights:

enter image description here

I: islands with no connection whatsoever; these are dead copper that provide no shielding value between adjacent traces, and if anything increase the capacitance between them instead. They would be better removed (I don't know if EasyEDA has an auto-remove islands feature?), but even better stitched.

P: copper fills into this region, but dead-ends, making a peninsula. Add stitching vias around its perimeter, or move around traces to re-connect it to surrounding copper.

*: these regions are completely disconnected from each other in this area, due to traces and pads crossing densely here. The only ground-return path is around a long loop, up and over by the big hole, or through the rest of the board area. Probably, the signals should be routed left (around the big hole, maybe even?), so that ground can fill under the ESP pads (+ stitching on both sides), or spaced out evenly so that ground can be interleaved and stitched.

On top of which, you've got the WiFi antenna there in the slot, which might not interact favorably with it (maybe the signals glitch during transmission, maybe the radiation pattern, gain or matching is bad, etc.).

In other words: avoid sawing up your board into a patchwork of antennas; make ground as contiguous and solid as possible, up to an impedance or length scale determined by the maximum harmonics / edge rate in the system. That is, no need to go nuts filling the whole board with vias, but one every cm or two, around traces and components, with a few more clustered where solid ground connections are needed, will do nicely.

There are more features elsewhere on the board but rather than pointing out each one, I'll just show these as examples. Instances will come and go as traces/vias are nudged, anyway, but the important part is to have ground nearby or wrapped around most signals, as this provides the best shielding, consistent impedance, etc.


Cheers! It looks like a good project for someone of your age, and is a strong start. Most of these points are easily resolved; learning how to do things the right way, and why, is what's most important here.

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    \$\begingroup\$ Regarding ground planes: One thing which took me some time to really understand is that the ground connection is just as important as the positive supply connection. We obsess about the length and width of Vdd traces or signal wires between chips but overlook that the ground connection goes across six vias and half the chip because its cut apart by traces. \$\endgroup\$
    – Michael
    Commented Feb 15 at 12:03
  • \$\begingroup\$ I also looked at islanding, but both top and bottom is ground plane with via stitching throughout the board, so should be less of a problem except for the connector. \$\endgroup\$
    – winny
    Commented Feb 15 at 15:27
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The main comment I have is regarding the schematic: don't go for this "blocky" layout of a schematic. Many "professionals" who have not seen a good schematic in their career seem to use this approach, but it defeats the purpose.

You see, a schematic is a graphical means of communicating technical ideas, it is a visual language that uses spatial relationships and visible connections to communicate ideas.

What you have drawn is a combined net list and parts list with blocks making it harder to read. A netlist is a textual list of connections between things, where all things with the same net name are meant to be connected together. Just because you've spread the netlist around some blocks on a "schematic" doesn't make it a schematic. Also, a parts list tossed around on the sheet is not readable either, and is not a schematic.

A schematic should graphically and spatially communicate at least most of the big ideas of the design - it should be apparent at first glance what's in the circuit. The hint that the schematic is pretty bad is when the PCB top layer with silkscreen on it is easier to read than the schematic!

I have re-drawn the schematic in Easy EDA just to show how it could look. It's not perfect by any means, but at least easier to visually follow where most important things go - such as VBUS feeding the +5V rail, it's important that this is obvious. The biggest annoyance were the lousy EasyEDA symbols, and I couldn't be bothered to draw my own decent ones in the time I had to mess with it. Given how lousy a platform it is, it seemed like putting lipstick on a pig.

Nicely re-drawn schematic of asker's circuit

Link to the EasyEDA project: https://oshwlab.com/kuba2/701486

I admit that EasyEDA's UX (user experience) is pretty poor, and the default component symbols are atrocious, and there's no symbol editor other than a "type in a pin list and it will be distributed around a square or upload an SVG".

Also, EasyEDA's authors seem confused between a drawing editor and a schematic editor. In a schematic, "nodes" in a wire have no meaning. By nodes I refer not to junction symbols, but to corner points/joints in the polylines that make up the wire, as you'd operate on in Inkscape, Adobe Illustrator, Photoshop's vector editor, office suite drawing tools, Corel Draw, etc.

Two wires drawn overlapping (partly co-linear) are meant to be just one wire, just as if you went with pencil over the same wire partially again. Wires with "nodes" along straight segments don't need these nodes. Wires visually continuous should be logically continuous. Etc. It just shows lack of basic understanding of the requirements of the software, no desire for any sort of pleasure derived from using it, and so on.

Still, for a beginner, EasyEDA's high level of integration, including LCSC and PCBway part inventories, is perhaps a good thing. So I won't suggest you use another tool just yet. Learning EasyEDA well is worth it as a starting point, and everyone needs to start somewhere.

KiCad is a breath of fresh air compared to EasyEDA, though. First and foremost, aesthetically speaking its library designers and curators didn't have nausea as their primary objective. EasyEDA's built-in symbols, as well as the community-sourced ones, are just a hodge-podge that makes schematics look awful.

If you want to see how beautiful schematics should look take a peek at HP and Tektronix service manuals, especially the later ones where there's a lot of digital stuff in addition to analog.


As far as the circuit itself, I didn't look to closely - it looked OK-ish. I've added a diode between USB-C VBUS and +5V rail, to avoid back-driving USB-C when the power is plugged in. I have not verified that the serial control lines are connected correctly direction-wise. Couldn't be bothered to look it up :)

Obvious problems:

  1. Neopixels need a 5V supply, and a logic level translator. I've added U5 74HCT1G125 for that purpose.

  2. No decoupling on the 7805.

  3. Zealous use of individual pads where connectors are intended.

  4. Heater ground return shares the common ground plane. Instead, the heater connector and FET should be close to the power connector, and the heater's ground return should connect to the connector directly, not via the common ground plane.

  5. Using just one NTC for control of the heater. Use two, if they diverge too much, turn the heater off and indicate error. You can always not stuff one if it proves unnecessary, but I personally get a bit worried about heaters, so there's that.

  6. Lack of hard-wired stay-open overheat protection - unless it's built into the heater itself. Assume that the FET fails shorted. Now what, you got yourself a fire??

  7. Lack of hardware watchdog that would turn the heater off if the MCU is not toggling the heater control pin. Even when the heater is "full on", the CPU can be turning it off in short pulses, just to indicate to the watchdog chip that it's presumably alive.

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  • \$\begingroup\$ There are some purposes for which graphical layout is useful, but there are times when something closer to a textual format with either an index, cross-reference marks, or search capability can be useful. \$\endgroup\$
    – supercat
    Commented Feb 15 at 16:10
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    \$\begingroup\$ Sure stuff can be connected with wires, but in the absence of net labels, ensuring that the "/rd" and "/wr" signals on a CPU are connected, in that order, to "/oe" and "/we" will often take more effort than ensuring that the CPU's "/rd" and chip's "/oe" are both connected to "CPURD", and the CPU's "/wr" and the chip's "/we" are both connected to "CPUWR". A format I've found helpful for a couple of my small projects was a spreadsheet-like table with net names as row labels, device designators for columns, and each non-blank cell containing a pin number and/or designator. \$\endgroup\$
    – supercat
    Commented Feb 15 at 17:31
  • \$\begingroup\$ Many kinds of subcircuits involving discrete transistors and gates can definitely be better represented graphically than via netlist tables, but being able to scan across a table row to see everything on a net is easier than following wires around corners, and into and out of groups. \$\endgroup\$
    – supercat
    Commented Feb 15 at 17:34
  • \$\begingroup\$ "In a schematic, "nodes" in a wire have no meaning." I would argue that is only a question of preference. The way you describe it was popular in the ol' days, but today I see most schematics with straight crossings as "bridge" and nodes as connections. At least in europe. Makes it actually more readable, but again, probably a question of preference and what you are used to. For everything else you wrote: +1 \$\endgroup\$
    – jusaca
    Commented Feb 16 at 12:52
  • \$\begingroup\$ @jusaca Sorry for not being clear. The nodes I'm talking of are nodes of a graphics editing program, not junction points. EasyCAD keeps wires as individual entities retaining their drawing history, just as if you were doing it in Corel Draw, Adobe Illustrator, Inkscape, MS Office drawing tools, etc. So as the schematic evolves, there is more and more chunks of wire in each net, and straight wires sometimes have several nodes in them, and it's a pain to manage it, and completely unnecessary. KiCad got it right. You can draw a wire from a 100 little chunks, and it's still just one wire. \$\endgroup\$ Commented Feb 17 at 18:34
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Your regulator choice is poor. An LM7805 will not withstand dropping 30-35V down to 5V for any sort of reasonable current.

Even at the conservative estimate of 50mA for the ESP just idling (no radio), you are talking more than 1W of heat being dissipated in a regulator with no real heatsink which is pushing the limit.

Add on four neopixels at up to 60mA each and you've hit well over 6W dissipated in the regulator. That may result in rapid unscheduled blue smoke.

You would be much better off with a DC-DC, either laid out fully, or an integrated module if you prefer.

You also currently have no bulk capacitance on the input supply as far as I can tell. Whatever regulator you end up with, you will need at least some capacitance on its input.


Secondly, I presume you are planning on running the heating element off the same supply input as the rest of the circuit. If you are planning on using PWM, consider adding bulk capacitance by the connector for the heater to smooth any switching transients.

I would consider adding also flyback protection in case the element is slightly inductive.

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    \$\begingroup\$ Fortunately, there are drop-in switching converter modules with the same outline and pinout as a 78xx. Efficiency is mid-90%s so no heatsink is required and they generally don't need extra input or output capacitors. \$\endgroup\$
    – vir
    Commented Feb 15 at 2:42
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All of the advice made here is very good, especially regarding the 7805. I just want to elaborate on why it absolutely has to be changed to a switching regulator.

The first thing to do is estimate the power consumption of your design. From the datasheets, we can estimate the following power requirements for the 3.3V supply...

  • ESP32: 500mA x 3.3V = 1.65W
  • CP2102: 23mA x 3.3V = 0.08W
  • Misc. Circuitry: 20mA x 3.3V = 0.07W (assumption)

That is a total draw of 543mA x 3.3V = 1.79W supplied by U3.

Now we can look at the 5V supply. For the AMS1117, we'll need to calculate the power using the formula P = Iout x (Vin - Vout)

  • AMS1117 (U3): 543mA x (5.0V - 3.3V) = 0.92W
  • NeoPixel: 6 ea. x 60mA x 5.0V = 1.80W
  • Misc. Circuitry: 20mA x 5.0V = 0.10W (assumption)

That is a total draw of 2.82W / 5.0V = 792mA to be supplied by U12.

Now we know the current draw through both regulators, let's look at the temperature rise for both.

As stated above, U3 will need to dissipate 0.92W of power. From the datasheet for the device, we see that the Junction-to-Ambient Thermal Resistance is 102°C/W (for the SOT-89-3 package). The device will have a termpeture rise of 0.92W x 102°C/W = 93.84°C. Add ambient room temperature and the device will be running at 66.3°C + 25°C = 118.84°C. That's pretty hot and very close to the devices maximum junction operating temperature of 125°C; you may want to reconsider this part.

Let us now do the same analysis for the 7805. For this example, let's look at this datasheet: Texas Instruments LM340, LM340A and LM7805 Family Datasheet

At the highest input voltage (worst case) the power dissipated by U12 will be 792mA x (35V - 5.0V) = 23.7W. Looking at pg 4 of the datasheet, we find that the junction-to-ambient thermal resistance of the TO-220 package is 23.9°C/W. This device will have a temperature rise of 23.7W x 23.9°C/W = 566°C!

Clearly that's not good. So you decide to solder the tab of the TO-220 to your board and use the PCB as a heatsink. Assuming your PCB is a perfect heatsink (which it isn't, no PCB is), then we can use the junction-to-board value of 5.3°C/W. Now we've got 23.7W x 5.3°C/W = 125.6°C, just a hair over the maximum junction temperature. But let us not forget ambient and add another 25°C to get 150.6°C under ideal conditions. It just won't work.

I hope this was helpful and not too confusing. I have to say that I'm really impressed by your work. If you make the changes recommended by the others, you should be good to go.

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