# Clarification of the loop response of a TPS54350 buck converter (LTspice)

I've modeled the equivalent model for the TPS54350 shown on page 14, Figure 23, using component values from application circuit on page 15, Figure 24.

I'm feeling quite rusty on my controls knowledge so I've been playing around with this model and have only come out more confused than I was to begin with.

LTspice schematic of the control loop model:

From page 14:

Plotting b/c shows the small-signal response of the power stage. Plotting c/a shows the small-signal response of the frequency compensation. Plotting a/b shows the small-signal response of the overall loop.

Frequency response of the control loop model:

Expected loop response from TPS54350 datasheet:

For the sake of sanity checking myself on my definitions of crossover frequency and phase margin am I correct in saying that the overall loop response has a crossover frequency of 27 kHz and a phase margin of 215° (34 - (-180) = 215)? Which would mean the overall loop response is very stable as the PM is >45°?

I don't understand why the power stage and frequency compensation responses are increasing in gain. I was under the assumption that the overall loop gain would be the sum of the frequency comp gain and power stage gain which is clearly not the case here. Is that even a true statement?

In an effort to further understand the compensation circuitry I removed it all from the circuit and ran the simulation again.

SPICE schematic of the control loop model with compensation circuitry removed:

Frequency response of the control loop with no compensation:

If I am understanding it correctly, the phase margin is the distance from -180° at 0dB. This means that without compensation the overall loop still has a PM of 106° and is therefore considered stable? Also, how is it possible that the frequency compensation response didn't change at all? In my mind it makes more sense that c/b would be the frequency compensation response and a/c the power stage response, why isn't that the case?

It is unclear to me why you did not use an averaged model such as the PWM switch to describe you buck converter? It would be so much easier and reliable. You can download simulation examples in LTspice from my web page, there are buck circuits built by my readers.

For your compensation exercise, you could use my free ready-made templates running with the demo of SIMPLIS, Elements. This is fast and easy, load the example, press F9 and you'll have the operating and the compensated ac response, all automated with the macro in the right side:

In a fraction seconds, you have the bias point and the compensated ac response:

Then run a transient step and enjoy the stable response:

With this type of configuration, the phase margin is read as the distance from the phase evaluated at the 0-dB crossover frequency and the 0° line. You can change the poles and zeroes position, the automated macro will calculate the new components values to check how they affect the ac response or the transient response. Kinda cool and fast!

• Ah, so if phase margin is evaluated at the 0 degree line there's actually a negative PM without the compensation circuitry and only 34 degree PM with..? That would make a lot more sense. Why is phase margin evaluated from 0 degrees for this configuration? Feb 23 at 19:55
• You can have a look at my APEC 2021 seminar, slide 15 and the following. Then, check slide 8 and the following ones of my APEC 2010 seminar, it should help you visualize the reason why this is 0°. Feb 23 at 21:29
• Oh my gosh, thank you. What an excellent slide deck, that is exactly what I needed! Feb 26 at 14:32
• This is cool then : ) Feel free to acknowledge the answer then, thank you. Feb 26 at 15:00