I have an ATtiny412 that has 2 pins (PA1, PA2) set as internal input pullups.

These 2 pins (PA1, PA2) sense magnetic reed switches with the NC setting. GND is active when closed on these switches.

The other 4 pins are allocated as follows:

  • PA6 goes to RF transmitter
  • PA7 controls EN on (WL102-341_TX_Module)
  • PA3 is set as output to avoid parasitic currents
  • PA0 UPDI is left alone

The IC is working on a battery @ 1 MHz and 3.3 V.

On power-up the IC sets up interrupts and is set to SLEEP_MODE_PWR_DOWN and then goes into a sleep loop.

RTC_PIT_vect is used for a long heartbeat loop.

PORTA_PORT_vect is used to wake from a pin change pins (PA1, PA2) using PORT_ISC_BOTHEDGES_gc.

The sketch works well, however, I have been busy optimizing power consumption.

From my measurements the IC by itself runs at 0.57 μA when in power-down mode (datasheet says 0.1 μA @ 25°C and 5.0 μA @ 85°C)

I'm OK with 0.57 μA since I used a multimeter and it's close enough.

My circuit draws around 264 μA when both pins (PA1, PA2) are grounded.

If I invert the pins I get 61 μA.

The regulator seems to have a quiescent current of around 54 - 60 μA but the datasheet does not specify.

I'm using the FS8860-33CH0003; it's what was available and the closest low-quiescent current and low-dropout I could get.

So after noticing the huge decrease in current when I use inverted pins I integrated this into my project.

As far as I understand I can use an N-channel FET to have my NC reed switch trigger the MCU pin.

This works but adds an extra 33.2 μA per FET and a 100 kΩ pullup total changes to 127.4 μA in power down mode.

Still better than 264 μA, but I would like to get under at least something like 100 μA.

Are there any tricks or tips with a small component count to decrease the current even more? Maybe there is something I have not considered?

Maybe it's easier to just use a carefully selected resistor in series with the reed switch to limit current, or get a better FET or increase the FET pull-up resistor?

I will get a better regulator in the future but this question is regarding the low current consumption using the pins.

In the picture:

  • No. 1 inverted pins: is my simple FET switch witha 100 kΩ pull-up 127.4 μA in power down mode, saves 136.6 μA.
  • No. 2 non-inverted pins: is just a 10 kΩ resistor in series with the reed switch 182 μA in power down mode, saves 82 μA.

enter image description here


1 Answer 1


The internal pull-ups in an ATTiny/ATMega are usually in the range of 20-50 kΩ, which is quite low for a low-power application.

I would disable the internal pull-up resistor, and use an external pull-up resistor instead. You could easily go for something on the order of 1 MΩ or possibly larger. If you are concerned about noise, add a small capacitor in parallel with the reed switch for noise filtering. Only needs to be 100 pF or so. The capacitor will also provide some de-bouncing for the switch.

At 20 kΩ with a 3.3 V supply, by Ohm's law you will have a nominal 165 μA current through the resistor when the button is pressed (continuous for NC switch). For a 1 MΩ resistor that would drop to only 3.3 μA.

You could try as much as 10 MΩ, which would drop the current draw even further to 330 nA, though at some point leakage current into the ATtiny pin will start to dominate (actually datasheet lists this as 50 nA, so it could possibly go higher). You also trade off noise immunity with higher resistors.

Alternatively, you could switch to a normally-open reed switch if that is possible. This way you are only drawing a current from the supply through the switch when pressed.

  • \$\begingroup\$ Thanks for your input. I went with NC for more security (if wire cut circuit will trigger). However thinking about it anyone can just use a magnet to trick the reed. Will try out the high value external pull-up resistor + cap and the NO reed suggestion. \$\endgroup\$
    – Jonas
    Commented Feb 29 at 11:42

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