I am trying to control the choice of 2 circuits using MOSFETs, at logic levels. Basically, I’d like to have one circuit feed bits to an IC in some conditions and another circuit do the same in another condition (both voltage related). The circuits in question don’t really matter, but rather I cannot figure out why the MOSFET route does not seem to work. It seems to hinge on the following, demonstrated in iCircuit:

enter image description here enter image description here

When using the circuit on top in both examples, you get logic levels, but inverted (the circuit is indeed an inverter after all), and it works. But in the lower examples (which are not inverters, but rather simply a switch), you do not get logic levels any longer. Using the MOSFETs in this way seems to demonstrate a significant difference between the n and p versions.

Why do I not get logic levels from the lower circuit?


1 Answer 1


In the lower circuit, both transistors have their drains connected to the supplies. That's called "common drain" or "source follower". The upper circuits have the sources connected to the supplies, a configuration called "common source".

Those two configurations behave very differently. For source followers, the source tends to follow the gate, but always different in potential by amount \$V_{GS(TH)}\$. You can see that in action with a simulation:


simulate this circuit – Schematic created using CircuitLab

With an input sweeping up and down between 0V and +5V (blue), here are the outputs of common drain (OUT1, orange) and common source (OUT2, brown) configurations:

enter image description here

The main features to note are:

  • The common source arrangement inverts

  • Common drain does not invert

  • Common source switches very "emphatically" when the input reaches \$V_{GS(TH)}\$, having very high voltage gain

  • Common drain output "follows", with gain of about 1

  • Common source output extends all the way to both supply potentials.

  • Common drain output is lower than the input by amount \$V_{GS(TH)}\$. For P-channel, the output would be higher, instead, but the offset would still be \$V_{GS(TH)}\$

It is the potential difference between gate and source that determines the conduction state of the channel between drain and source. The difference in behaviour is due to the fact that in the common-drain setup, the source is permitted to rise and fall in potential by R1. By contrast, for common-source, source potential is held fixed at the supply potential (0V here, or +5V if this were P-channel).

Your circuits are simply combining those with P-channel equivalents, which replace the resistors in my N-channel examples. This produces a push-pull system able to both sink and source output current equally well (better than the resistor could), but the behaviour of each "half" individually remains exactly as I described above.

In the common drain configuration, you can never have an output that extends all the way to the supply rails (unless the input extends well beyond those supplies), and you will not have the clear, emphatic switching exhibited by the high-voltage-gain common source arrangements.

  • \$\begingroup\$ Thank you very much for the explanation. \$\endgroup\$
    – Fed
    Mar 2 at 4:00

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