# How/why exactly does this JFET work as a current source?

I am designing a mic amplifier with a transimpedance amplifier circuit. The mic is connected to a JFET. I know how a transimpedance amplifier works and that it works by converting current into a voltage but I do not understand in connection with the below circuit how exactly does this process take place?

So there is a voltage drop across the resistor R1 and this is a variable voltage. The capacitor C1 works as a short for AC so the variable voltage generated by the mic is directly seen at the negative input terminal of the op amp. Why doesn't the output then swing to the positive or negative voltage rail if the voltage at the negative input terminal fluctuates sinusoidally?

How exactly does the mic/JFET branch of the circuit function as a current source supplying a constant current to the op amp?

EDIT: THE JFET is integrated in the mic capsule in the below image

• Where's the JFET? Mar 1 at 14:57
• In this image it is integrated in the mic capsule Mar 1 at 14:57
• What makes you think the JFET works as a constant current source? Typically it is used as a first stage amplifier. Mar 1 at 15:20
• I mean the point of this circuit is as how much I am aware of is to turn current into voltage with the resistor R4. So the entire block with the mic/jfet and R1 need to be a current source for this idea to make sense and for the TIA to work Mar 1 at 15:23
• Mar 1 at 15:37

This is a model of the microphone internals, except for C1, which is outside:

simulate this circuit – Schematic created using CircuitLab

I am able to connect C1 to ground in this model, instead of the op-amp's inverting input, because that input happens to be a virtual ground, always near 0V.

Source V1 represents the potential difference across the electret microphone, which provides bias for J1. V2 is the simulated microphone signal, which I've set to be a 1mV peak-to-peak sinusoid.

I've chosen R1 to pass exactly 2mA for this particular transistor, in this particular setup. Consequently, in quiescence, $$\V_X = +1V\$$.

By measuring the current $$\I_2\$$ through J1's channel, resulting from fluctuating V2, we can calculate the transconductance of J1:

The current waveform amplitude is 5.8μA pk-pk, and so transconductance is:

$$g_m = \frac{\Delta I}{\Delta V} = \frac{5.8\mu A}{1mV} = 5.8m℧$$

The question now is: what are the consequences of changing $$\I_2\$$? In other words, what other currents vary as a result of changing $$\I_2\$$?

Considering that C1 has a very low impedance to AC, and R1's AC impedance is huge in comparison, changing currents will be almost completely sourced and sunk by C1. R1, by contrast will experience almost no changes, and we should expect to see the potential at X hardly change at all.

Another way of looking at this is to consider that C1 is very reluctant to change its own potential difference. Fluctuations in current through C1 would have to be very slow, to give C1 sufficient time to charge or discharge sufficiently to alter its long-term DC charge.

Consequently, $$\V_X\$$ remains pretty constant in spite of current fluctuations at frequency. It's difficult to show this in a graph, because the amplitude of $$\V_X\$$ is tiny, but I'll try anyway:

The amplitude of fluctuations of $$\V_X\$$ (between the green markers) is about 200μV, corresponding to about $$\I=\frac{V}{R}=\frac{200\mu V}{2k\Omega}=100nA\$$ of variation in $$\I_1\$$. That's very small compared to 5.8μA of variation in drain current $$\I_2\$$.

Kirchhoff's Current Law tells us:

$$I_1 = I_2 + I_3$$

Since $$\I_1\$$ is fairly constant, we can then assume, for signals at frequency significantly above DC:

$$I_3 \approx - I_2$$

In other words, any fluctuations in J1's drain current $$\I_2\$$ end up flowing not through R1, but rather through C1. And since C1 is the input to the transimpedance amplifier, it is $$\I_3\$$ that is amplified.

Interestingly, because C1 passes only AC current, with a mean value of 0A, C1 effectively decouples the DC component of $$\V_X\$$ from the amplifier. This is the first time I've seen this setup, and I find it interesting and clever. Thank you for bringing it to my attention.

• Thank you for your thorough answer. But what happens to the fluctuating voltage? If it passes through the capacitor should it not appear at the other end (at ground)? Mar 1 at 16:29
• Oooh. I Think I understand now. There is no fluctuating VOLTAGE to begin with because the fluctuating current goes through the capacitor. At least most of it. Mar 1 at 16:33
• I have another related question. When I plot the TIA in falstad like this: tinyurl.com/24l4kjs8 it starts to oscillate. I know that if there is noise it will start to oscillate but this is an ideal op amp used in the simulation with no noise, why does it oscillate then? Mar 1 at 16:35
• @LEXORAI That's why you have C3 in your circuit. Frequency compensation to prevent near 180° phase shift (ie. positive feedback) under certain conditions. Big topic. Mar 1 at 17:09
• @LEXORAI I don't know how Falstad works, so I don't know what the initial conditions are, but, for example, C1 still has to charge to the operating point, so any presumed symmetry might be misguided. Maybe even rounding errors. I can't say, really. Mar 1 at 18:00

N-channel JFET

An N-channel JFET is a "natural" at being a decent constant current sink.

Here's the J107 as an example: -

The vertical axis is current and, the horizontal axis is time (in which the voltage source V1 is varied from zero to 20 volts). As you can see, once you get to about 0.4 seconds (5 volts across JFET and series resistor), it starts behaving like a constant current sink. Hey, it's not perfect but, what can you expect from two components.

Because you need to take the gate-source voltage negative in order to shut-down conduction, the source naturally "finds" a voltage where the device enters near-equilibrium.

If the JFET tries to conduct more, the gate becomes more negative with respect the gate and conduction decreases. If the JFET tries to conduct less, the gate is less-negative with respect to the source and conduction increases.

It's also a very good example of negative feedback in action.

• Thanks for the answer. I understand this concept that if you add a resistor across the emitter you can create a constant current source because of feedback. Mar 1 at 16:38
• It's a source not an emitter and, it's a current sink and not a source. Mar 1 at 16:45
• yes, source i was thinking of bjt... And what is the difference betweeen current sink and source anyway? Mar 1 at 16:47
• @LEXORAI an n-channel JFET sinks current from a more positive voltage and, a p-channel JFET sources current from a positive voltage to a load that is more negative. It's the terminology we use. If we were talking about electron flow then the n-channel is a near constant electron source. Mar 1 at 16:52
• Okay, thank you. Mar 1 at 16:57

Why doesn't the output then swing to the positive or negative voltage rail if the voltage at the negative input terminal fluctuates sinusoidally?

Voltage at opamp "-ve" input doesn't fluctuate from mic signal...it is a nearly-constant DC voltage set by the DC voltage at opamp "+ve" input pin. However, current at "-ve" node does fluctuate due to mic signals. The JFET drain current is the cause of fluctuating current at opamp "-ve" node.

If you assume that JFET is an AC current source, then the opamp gain is set by ratio $$\R_4 \over R_1\$$

EDIT
Two simulations of an electret microphone module. The left circuit in dashed box has output voltage fluctuations that are frequency-independent...at all frequencies, V(drain_2) is -24 dBV.

The right circuit is similar, but drain current now has access to the opamp "-ve input" and to the 75k resistor. Opamp output is amplified to -2.23dBV (V(out)) at 1000 Hz. The voltage amplitude at the opamp node "-ve input" at 1000 Hz is -85.7 dBV while V(drain_1) is -69.2 dBV. It is apparent that most of the signal voltage is suppressed at this node...signal current is diverted to the 75k resistor.

Compare the output voltages of these two circuits: V(out) versus V(drain_2). The difference is about 22dB, which is the same as $$\75k \over 5.9k\$$

• But the voltage at resistor R1 fluctuated sinusoidally. This point is then connected to the capacitor at the negative terminal. The AC fluctuation passes through the capacitor and is shown at the negative terminal? In DC the voltage at the negative terminal is the same as the voltage at the positive terminal but the AC fluctuating voltage from the mic is shown also at the negative terminal? Mar 1 at 15:52
• @LEXORAI The mic connected to R1 operating with no connection to opamp does create a fluctuating AC voltage across R1...caused by JFET's fluctuating drain-to-source current. But when the opamp circuit is added, voltage fluctuations at JFET drain cease. Fluctuating drain-to-source JFET current now appears across R4. Opamp "-ve" terminal becomes an AC virtual ground. Mar 1 at 16:13
• I guess the question is why do they cease? I think Simon Fitch ansered my question regarding how the capacitor is a short for the current and the oscillating current does not go through resistor R1 and so it does not cause any oscillations to begin with Mar 1 at 16:43
• Simon has drawn the AC virtual ground node by grounding his C1 (4.7uf). I'm adding an edit to my answer. It shows two circuits: (1): JFET sending current to a single 5.9k resistor. (2):same circuit with opamp added. Mar 1 at 18:56
• I do not understand why are we comparing Vout with Vdrain 2 Mar 1 at 20:04