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I plan to design a 4-layer board that will work on an industrial machine. This machine has AC motors driven by commercial AC drives on it. Since the earth ground is very weak at the place, they radiate a lot of noise to the chassis as multiples of 3kHz, which can couple to my PCB. My board will have a 48MHz MCU evaluating 3 ADC signals, some PWM signals for LEDs, I2C, USART. There will be a 1A fuse, a common mode choke, zener regulator, decoupling capacitors at the PCB power connector input, local decoupling capacitors at IC power pins, RC low pass filters on analog signal power throughout the board.

At this point I am undecided whether to use the stack-up GND-PWR/Signal-PWR/Signal-GND with via stitching along the PCB edges (essentially to create a Faraday cage) or PWR/Signal-GND-GND-PWR/Signal. Which one would be best for lowest EMI susceptivity?

Note: I have read several posts on layer stack-ups. They mainly focus on signal crosstalk, SI and EMC. I couldn't see design suggestions for low EMI susceptivity from other nearby devices.

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  • \$\begingroup\$ Do you plan on keeping the board hanging loose near motors or use a metal case? \$\endgroup\$
    – Justme
    Commented Mar 8 at 16:16
  • \$\begingroup\$ I plan to keep it inside a plastic/acrylic case near the motors. Should I use metal case? \$\endgroup\$
    – Semih
    Commented Mar 8 at 16:20
  • \$\begingroup\$ Since the earth ground is very weak, would a metal case also not radiate this EM signal? \$\endgroup\$
    – Semih
    Commented Mar 8 at 16:34
  • \$\begingroup\$ A grounded metal case will help more, but any metal case will act to shield from radiated noise. \$\endgroup\$
    – Hearth
    Commented Mar 8 at 16:40
  • \$\begingroup\$ Does this answer your question? The best stack-up possible with a four-layer PCB? \$\endgroup\$
    – JYelton
    Commented Mar 8 at 17:10

6 Answers 6

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Note: I have read several posts on layer stack-ups. They mainly focus on signal crosstalk, SI and EMC. I couldn't see design suggestions for low EMI susceptivity from other nearby devices.

As your question regards differences between your concerns and existing posts, I will take this as invitation to explain the differences, or better explain why: why those posts concentrate on these particular subjects, and why you shouldn't be worried about the stackup.

Which, to not just hint at, but make explicit; my basic answer is:

It doesn't matter, don't worry about it.

Now, to explain why.

Stackup matters most at high frequencies. Frequencies on the order of trace lengths, board dimensions, components, etc.

That is, note that an EM wave flowing through space, or guided by metal or dielectric structures -- a trace is a transmission line is a waveguide, which literally, guides waves, as waves travel largely in the space between conductors, hardly within them at all, so we use this word quite literally -- the wave has some frequency, or harmonics, or rise time, and as it travels at the speed of light [in the local medium], there is necessarily a corresponding distance, a wavelength, and there is a corresponding "electrical length" of some given geometry, traces on a board, wires in a harness, etc.

When the electrical length of a structure, is comparable to the wavelength of a signal, expect transmission line or wave interactions (implied: heightened EMC concerns).

In this high-frequency regime, if we have traces routed on the outside of the board (microstrip transmission line geometry), there is a small but nonzero coupling factor between that trace, and free space: radiation. Which reciprocally means both the potential for emissions from internal signals getting out, and susceptibility to waves from the outside getting in. The coupling factor depends on trace geometry, length, and frequency, and generally increases as frequency goes up.

We can reduce the coupling factor of microstrip, by burying it under a shield; a trace surrounded on all sides by metal, is called a stripline geometry.

So these are the two alternatives offered. By designing a whole board with ground planes inside or out, you are making a decision to use just microstrip, or just stripline, for the majority of traces on the board.

At a glance, you would suppose microstrip is worse, because -- as I just said, it has some coupling factor, whereas the other is shielded. This is true. But it matters, by how much.

The kicker is this. You're worried about low frequencies. Quite low as EMI goes, and potentially even below frequencies where the board provides any shielding benefit at all.

The difference between microstrip and stripline is important at high frequencies, where signal integrity and crosstalk are also concerns. It's no accident these topics go together; they are all important at the same time. But this is largely a concern in the 10MHz+ range, and the difference for lower frequencies, given a responsibly laid design in either style, is minimal.

Hence my answer above: it doesn't matter, don't worry about it.

I would even suppose the outer-grounds design is worse, for the following reason: it necessarily has more holes in it, because you cannot avoid holes in the ground plane where components, their holes/pads, and all the vias joining to inner signal layers, lie. It also can't be very much better than microstrip, because while you can save the coupling factor between traces and free space, you cannot do anything about the coupling factor between free space and the components themselves.

There is a "secret" 3rd option: pour ground on all layers, stitch them together with liberally placed vias, and route signals where it is most practical to put them. This way, you can have ground fill underneath components, and above long trace routes, and short traces (between adjacent components, say) are... up to you, I guess, but as coupling factor depends on length relative to frequency, a few mm, cm even, routed along the surface won't exactly matter. But by extension, a few 10cm probably won't matter either -- and now that basically encompasses a whole board (asserting some sort of hand-waving average size that may or may not apply here). Which is basically to say, go ahead and microstrip the whole thing, it won't matter.

But where things get really nasty are at the low frequencies.

As low as a few kHz, there's simply nothing a PCB alone can do about it. At these frequencies, copper foils are reasonably transparent to magnetic fields. The only thing you can do is filter signals where they come in, use differential design and routing techniques if possible, and hope for the best.

You can restore shielding effectiveness by using heavier metal. Heavier PCB often isn't practical, but an enclosure made of ~1mm thick aluminum or steel, reflects or absorbs magnetic fields down to quite low frequencies (some kHz; even further in the case of annealed mild steel), is reasonably priced, and has obvious structural benefits (at least, assuming that structure is valuable for the application). If you have shielded cables, and bond them to the enclosure so that induced noise currents are shunted around the signals and electronics within (within both cable and enclosure), you gain the best possible chance of rejecting EMI.

Further: since the PCB, enclosure, cable shields, everything really, will be "leaky" to magnetic fields at low frequency, insist upon differential connection for all signals you possibly can; only the lowest bandwidth signals (100s Hz, maybe?) can be single-ended (as interference can simply be filtered out). Using shielded twisted pair cabling, the shields are effective at high frequencies, providing significant rejection of ambient noise (operation at or above 50V conducted or 50V/m radiated should be no problem, with responsibly-joined shields, metallic connectors, etc.), while the twisted pairs reject incident magnetic fields, ground loop, etc. You will likely need special transceiver circuit designs to support this (e.g., diff amps, signal isolators), but a confident and reliable solution can indeed exist.

Now, whether any of these are actually motivating, are real requirements, in your application -- we have no idea. You could gather some instruments and measure field strength and spectrum in some example sites. You could measure ground-loop voltage between prospective cabling, or ground-loop current between grounds. You could look up standards typical for the environment, or what standards other (related? competing?) products follow.

Most likely, it is not nearly as bad as you imagine it to be -- industrial sites can be brutal, but they still need to work, and it's rare that some VFD is discharging full-peak switching edges directly across your device, the connected sensors, comms cables, whatever. (Granted, there are definitely ways that can happen, whether intermittently as in fault conditions, or due to degradation of shielding (e.g. loose conduit grounding?) or actually-bad (probably, hopefully, illegal) wiring..! But, perhaps your equipment isn't intended to suffer -- let alone survive -- such abuse, either? Sometimes, failure is an option!)

But also, that it will probably be worse than you expect, but in certain specific ways that are hard to anticipate, especially when you don't know what to look for. Well, this is simply the nature of the subject; EMC is complex, and considerations are holistic, i.e. you potentially need to take into consideration everything connected, and nearby, to properly assess an EMC environment. Which is further reason (albeit a more heuristic one) why I offer the do-not-care stance: the likely difference is so small, while the level of understanding required to make that decision is so vast, it seems very unlikely that such a difference would prove valuable here, given the effort required.


Finally, a somewhat more managerial or psychological perspective:

Consider your situation, and what you're asking about. You want to make a thing. You want the best for your creation, you hope it works right the first time, or with minimal follow-up work. You hope it doesn't take a dozen revisions to complete. You dread it might. So you want to know the best practices. That's very wise, and understandable.

You are also aware that this is a complex topic; electronics, in general, goes deeper than anyone has so far been able to look, I suppose you could say; but even fairly pedestrian technology contains (top to bottom) more than any one person can fit inside their head. Not that you need to know every possible detail to put together a board, it's enough to know the datasheets and some theory; but board-level design, too, takes many years to master (and, I would dare say, anyone who says they've mastered it, definitely hasn't..!). So you can at least get a feeling that, mastery isn't going to be built through rules-of-thumb and (simple) best-practices alone.

My warning is this: beware of "bikeshedding". This is the habit of, committees for example, to sometimes concentrate on relatively trivial details ("what color do we paint the bike shed?" "what siding should it have?" etc.), while the important structure or technical detail ("how big?" "where do we place it?" "how many/what kinds of bike racks does it need inside?") or other hard work (potentially, controversial topics that no one in the group wants to raise -- "do we need to evict someone from that site to place it there?") goes neglected. I say committees, but it affects anything from individuals, to groups small and large, and probably other more abstract decision-making systems too.

And, mind, not to assert that you aren't working on other things too; just to say, beware of holding up this one step (a PCB layout) over such a decision.

Now, much as I might like to, I still won't say to avoid rules of thumb and simple-best-practices; but, just be mindful of them. They aren't hard and fast, they are often wrong, and there are many situations to which they do not apply. Concentrate on the whole picture: you're bringing a design to fruition, not just routing a PCB.

And yeah, it's easy to say that, yet oh-so-devilishly-hard to actually do -- but, I think, there are still some things the novice can do to help avoid these traps.

The solution -- at least, one I think -- is to embrace failure. Or rather, the potential for it; the unknown. Yes, you want your project to succeed; and perhaps you are under some pressure for it to -- but until you are an expert in the field, there's simply no way to even begin to guarantee that; if your boss expects perfection, your boss is a fool. (I'm making assumptions about circumstances here, of course, which may not be applicable at all; but likely there are some readers out there to whom this applies.)

Put another way: yes, there are differences between these layout techniques, but (as should be clear by now) there is no strict ranking. There may be situations to employ one, favorably, over the other -- but until your skills are advanced enough to identify those situations; how would you even know?

There is a certain confidence, a sort of nihilistic freedom, in embracing uncertainty: when you simply don't know what to do, when you don't know how to weigh a decision, rather than be stuck in analysis paralysis -- just do it, pick one and see if it works out! At worst, you will have a starting point, a platform to probe and debug on. Even if it turned out a bad idea, you can still say, given your state of knowledge at the time, it was among the best possible decisions you could make.

Even if the board ends up trashed, remember it's not wholly wasted effort: you still honed your circuit design and layout skills, and learned at least one way not how to do something -- not that a negative result is very informative, but we can try to draw some more positives from it: for the next run, strategize ways to discover more information, and to make it easier to discover -- add probe points, break down the circuit into manageable building blocks, vary parameters (say it's a power switching stage, test it at low voltage and low current first, then increase each one in steps until you verify the circuit is behaving as expected), etc.

As for business related aspects -- managing uncertainty is part of the process, of course. Perhaps you don't have much pull on the project design or management side, I don't know (or, if this is even a work-related question as such!), but to the extent you can inform them of uncertainty, and to the extent they're receptive to better predictions and more lenient budgeting -- that's ultimately a win for everyone. Or, turn it around: if failure is simply not an option, if the timeline is too tight, make it clear that those expectations are unrealistic as-is, and they will need to spend more to meet them; an outside consultant or contractor could be brought in, for example: a subject expert who can identify the environment, the specifications to suit it, and circuit design methods to implement it.

And, yes, this assumes one has the freedom to do so; there are the situations where one isn't at liberty to second-guess the higher-ups. There is still, perhaps, a little bit of nihilistic comfort in this -- emphasis on "little", mind, but consider: if your boss's expectations were wildly beyond your capability to begin with, it's probably inevitable that you were going to get fired by them anyway, and probably for reasons far more trivial than already doing your best. Your best bet in such a situation, might be to lay low, not cause a fuss, and slow-walk the inevitable demise of the project; indeed in that case, bikeshedding might lead to useful yak-shaving; for which "useful" now has a very different target (your success) than where we started (project success), hah.

Cheers and good luck!

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Extensive research has been conducted to determine the optimal number of board layers, their arrangement, and the thickness of each layer. In our investigation, we thoroughly examined Rick's training video, which offers valuable insights into this topic. You can access the educational video via this link: Rick's Training Video.

Mr. Rick, a highly experienced professional with 45 years of expertise in hardware and PCB design, delves into the arrangement of different layers in the video. According to him,

a four-layer board is considered to be at a normal level and is likely to pass the EMA test. However, for stronger boards, it is recommended to have six layers or more, as proven in various tests.

Screenshot from YouTube video showing possible PCB stack-ups Image source: YouTube - Robert Feranec "How to Decide on Your PCB Layer Ordering, Pouring and Stackup (with Rick Hartley)"

In the realm of designing boards, Mr. Rick emphasizes the importance of keeping the ground and power planes as close as possible to minimize magnetic distortion between them. Additionally, he advises against sandwiching the signal plane to ensure optimal performance.

Screenshot from YouTube video showing possible PCB stack-ups Image source: YouTube - Robert Feranec "How to Decide on Your PCB Layer Ordering, Pouring and Stackup (with Rick Hartley)"

Based on my experience, I would recommend utilizing a 6-layer board with a thickness of 1.2mm, as this configuration has proven to be particularly effective in passing EMI tests. This approach aligns with Mr. Rick's insights and enhances the overall robustness of the PCB design. Screenshot from YouTube video showing possible PCB stack-ups Image source: YouTube - Robert Feranec "How to Decide on Your PCB Layer Ordering, Pouring and Stackup (with Rick Hartley)"

And the final point, at the end of your design, check the newly generated Gerber file and check all the ground layers so that there are no major disconnections in them.

Design by my self in Edraw max Image source: Design by myself in Edraw max

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For EMI mitigation, the biggest thing is to have an unbroken GND plane directly under your high speed traces (i.e. probably anything above 1MHz). In general, I would say it's good practice to have an unbroken GND plane in any 4-layer PCB design. If you want, could do a Top signal layer w/ GND pour - GND Layer - PWR Layer - Bottom signal layer w/ GND pour stack-up. This give a balance of having a unbroken GND plane while still having a power plane to route your power traces (or to route extra signal traces). You would just have to keep your high speed signals on the top layer so that they are right under neath the GND plane.

If you're forced to route high speed traces on the bottom layer, then what I would do is either "cut out" a small section of the PWR Layer and add a copper pour right under your high speed traces, or just make the PWR layer a second GND layer if you have a lot of high speed signals on the top and bottom of the board.

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There is no best stackup, it is entirely design dependent on sources and requirements. EMI compatibility is an art.

The best stackup is to minimize capacitance and inductance of the reference plane for signals (RF or High speed). There are multiple ways to accomplish this. Breaking the ground plane increases inductance and is undesirable. The best way to mitigate EMI radiation is to return the EMI current back to the source with the lowest impedance pathway possible (usually accomplished with a capacitor or capacitors through a ground plane).

Depending on the PCB simply creating a 'faraday cage' might also not accomplish the goal, very high frequency signals can radiate to a ground plane and vias will prevent that from leaving the ground plane. If the signal is not shorted back to the source the preferred pathway could be through the air, causing the ground plane to radiate (any conductor can be made into an antenna, and antenna properties can be applied to planes).

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You don't say how much current you need, but it sounds like typical application of MCU with low current needs primarily. Of course the AC motor drivers might be high current but hopefully you can keep that very tightly localised to the power drivers.

I would suggest Sig/GND/GND/Sig. Route the power as traces. Make sure you have a decoupling cap next to each IC power pin.

You could try to keep the high speed stuff (SPI, motor driver PWM) on L1 and the analog signals on L4.

Wherever any signal (digital, analog or otherwise) crosses from L1 to L4 using a via, place a stitching GND via right next to it.

If any of the digital signals are long enough to be considered transmission lines then you need impedance matching series resistor at the driving end of the net.

If you cannot route it this way then consider going to 6 layers with the inner two layers being power, either as planes or power traces with GND flood.

As you are concerned with susceptibility you need to carefully filter anything coming in on a connector, both for high voltage transients and just noise.

Try to leave some distance between the cables that carry motor switch current and cables that carry analog and feedback signals and cables that carry the power in to your board.

But don't arrange it so that the MCU is in the middle of the board surrounded by connectors! Ideally the connectors are along one edge with as much space as possible between the MCU any power regulator, motor drivers and the analog sections. If you can push the analog filtering, signal conditioning, amplifier (if you have one) all into a corner of the board away from everything, that will help I think (keep the analog sections away from any fast digital and driver signals).

If the layout is not so dense then gnd floods on L1/L4 might be helpful, but only if there are good stitching vias placed regularly and there are no GND stubs. Adding a GND ring around the edge of the board with closely spaced stitching vias can definitely help.

In your noisy environment my first instinct would be to leave any mounting screw holes unplated or at least not connected to GND. I would leave as much clearance as you can to any copper. Connect the metal chassis (if you have one) to the power negative in one place only, but using a 1206 0R resistor. That gives you the option of connecting it or not.

Think carefully about how any cable shields will be connected. You don't want any current flowing through the shields.

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There is no ideal stackup.

Given below a good 4 layer stack up suggested by Rick Hartley.

enter image description here

To know more about stack up planning please refer this.

There are some more good 4 layer stackup suggested by KENNETH WYATT .

Please see below.

enter image description here

enter image description here

Please refer this EDN article for more about the above stackups.

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