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I have the following circuit:

An input that can go negative (+/-5 V sine wave), and two inverting op-amps. The second op-amp is "current buffered" and is driving the base of a BJT.

enter image description here

Here is a SPICE simulation screenshot:

enter image description here

In practice, for the real circuit, the input should not go negative, but it can if something goes wrong. This is why I am using a sine wave for the input here.

The output (V-output-opa2), has the desired form, it is always positive. This is what I want. However, a less desirable feature here is that the second op-amp goes to the negative rail whenever the input goes negative, because - as I understand it - of the feedback loop including the BJT: the op-amp can't drive its non-inverting input negative because it is tied to ground; it tries though, and therefore it goes to the negative rail!

Q1: Is it a problem? I would like this circuit to work for a long time.

Q2: If it is a problem, I do not see a solution except preventing the input itself from going negative; in that case, how would you do it? Is there any other solution?

For the record, I do not want to tie the emitter to the -12 V power supply, I do not want the output to ever go negative.

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4 Answers 4

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First, let's make the circuit more readable, and reproduce it in CircuitLab:

schematic

simulate this circuit – Schematic created using CircuitLab

Now we can simulate it:

enter image description here

As OPA2 goes about 5V below Q1's base, Q1's B-E junction will break down. At that point, the simulation results are not valid, since typical SPICE transistor models do not model this breakdown.

Instead, you'd want a precision rectifier circuit. A classic one comes from Precision Absolute Value Circuits by David Jones and Mark Stitt from 1997. It works quite well with the TL07x/08x op-amps you've selected. With a slight modification, it becomes a Half-Wave Rectifier. Instead of R2=R1, we set R2=0Ω, i.e. a short:

schematic

simulate this circuit

D3 protects the base of Q1 from negative transients on the OPA2 output. Ri is optional and protects the op-amp input from excessive currents due to transients of various origin. C1 stabilizes OP1 by providing local high-frequency feedback.

Waveforms:

enter image description here

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    \$\begingroup\$ Even though I think this solution is overly complicated, +1 just for showing the OP how to make an intelligible schematic. \$\endgroup\$
    – tobalt
    Commented Mar 13 at 7:32
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    \$\begingroup\$ @tobalt OP could use a rail-to-rail jellybean op-amp powered from 6-7V and that would do a fine job of constraining the output. My goal was to show something close-ish to OPs original architecture. \$\endgroup\$ Commented Mar 13 at 14:00
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If your output is what you want, and there is no undue stress on the parts in the circuit, then it is by definition correct. That stress part could be an issue for your transistor. The Vbeo is 5V. When your circuit goes negative, it has 12V across the Vbe junction. This will fail in real life.

A simple fix could be a resistor and a diode to clip the negative voltage. In the circuit below, when the opamp output goes to -12V, D1 will be forward biased and keep the voltage to about -0.7V. This will protect the transistor.

schematic

simulate this circuit – Schematic created using CircuitLab

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    \$\begingroup\$ That diode can be placed more efficiently. If you place it instead between the second op-amp's output and inverting input, you protect the transistor and prevent the opamp from saturating. \$\endgroup\$
    – tobalt
    Commented Mar 13 at 7:21
  • \$\begingroup\$ I went with your solution @Aaron and implementing the comment from tobalt, thanks. \$\endgroup\$
    – DarkBulle
    Commented Mar 13 at 17:59
  • \$\begingroup\$ @DarkBulle But you marked the other answer as the solution? Doesn't seem right. \$\endgroup\$
    – pipe
    Commented Mar 13 at 20:00
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Q1: Is it a problem? I would like this circuit to work for a long time.

Answer: Yes, as the circuit is now, where there is no resistor in series with the base to limit base current when U2 base is driven negative wrt U2 emitter. This could damage transistor U2.

Q2: If it is a problem, I do not see a solution except preventing the input itself from going negative, in that case how would you do it? Is there any other solution?

Answer: there are several ways to solve this problem. The simplest way is to not have a negative 12V rail at all - that way no voltage at any node can go negative.

Is there any reason this negative rail is needed? One reason would be if you are you trying to have a very accurate output at 0V when the input is 0V. If the output does not have to go lower than, say, +20mV, then the circuit as you have it now but with no -12V rail should be OK - unless you want the output terminal to be able to sink a large current. If you have the same circuit but make V3 equal to 0V (no -12V rail) then the output resistance at Vout=0V is 470r to 0V; a current of 1mA being driven into the output terminal will cause Vout to be simply:
V = I * R = 1mA * 470r = 470mV.

Another parameter to be aware of is the output voltage range of the opamp. Older opamps, such as the 741 and 324, cannot swing closer than 0.5V to each supply rail (depending on how much current is flowing, and in what direction, from the output pin). More modern opamps, such as the OPA2196 can swing to within 20mV of each supply rail while soucing/sinking substantial current. It all depends on the design of the opamp, you will need to look at the datasheet to get the details.

The next simplest answer has already been presented: a diode across the BE junction of the transistor, and a resistor between the base of U2 and the output pin of opamp U1.

BTW: we usually refer to transistors as "Q", not "U"; "U" is used for integrated circuits, such as op-amps.

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An easy fix would be to allow the output to go negative by taking the 470 ohm output resistor to -12V instead of ground. This will have the effect that the output can go negative, but that may be a benefit in that it allows you to detect the anomalous condition where the input goes below zero.

If you just want to keep it out of saturation without affecting the circuit in any way, add a diode with its anode at U1:IN- and its cathode at U1:OUT. That will satisfy the op amp with going only 0.7V below ground and improve the recovery response as well as protecting the transistor base from serious negative voltages.

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