SG3525 feedback identification

Question

This is from a UPS which creates 350VDC from 12VDC, How does this arrangement work to control presumably the duty cycle of SG3525?

Compensation (pin 9) and inverting input (pin 1) are connected directly together, non-inverting input (pin 2) is connected to the optocoupler and has a 5k+5k voltage divider to VCC, which at 12 V from battery would create 6 V which should be under 5 V?

I tried looking for similar designs but failed to find one, if powered, circuit does create under 100 VDC on the output that slowly climb in 10 seconds or so.

I know there is a sawtooth oscillation that is compared with error amplifier, if Non Inverting input is pulled low duty cycle should decrease but I am already getting barely any output. Please help me understand this design.

Update: Managed to trace it using bright light under pcb and scratching traces at possible paths. Now schematic is more accurate.

^{simulate this circuit – Schematic created using CircuitLab}

Answer 1

At the SG3525, with no current flowing into the output of the opto, R3 (5k) & R4 (5k) will cause pin 2 to be at 6V (higher than the 5.1V Vref at pin 8), which causes the SG3525 to output pulses at maximum pulse-width.

The TL431 with R1 (602k) & R2 (4k) as shown will allow current to pass in the LED of the opto when "High voltage" is above 378V. Below that voltage, the opto LED current will be very low. Above that voltage, the LED current increases, which then causes current to flow into the output pin of the opto from the join of R3 & R4, which causes the voltage at SG3525 pin 2 to reduce, causing the voltage at pin 9 to match the voltage at pin 2, which causes the pulse widths to reduce. This then causes the output voltage to reduce, until the system reaches equilibrium under negative feedback where the current in the opto LED is at the required level to cause the pulse widths to remain constant.

Note, however, that the LED current is drawn from the capacitor marked as 35V 100uF. That voltage is probably coming from an aux winding on the main power transformer, which is controlled by the SG3525 output pulses. If that is the case, then there will be no LED current until the voltage on the cap exceeds the cathode voltage of TL431 plus the forward voltage of the opto LED.

Question:
Where does the power for the SG3525 come from? This is marked as an ideal "+12V" source in the schematic, but is that really the case? Perhaps this being generated from, say, a bleed resistor from a high-voltage source? If that is the case, then I would look there first, to make sure the SG3525 has a good power supply during the start-up process.