# How should a counter with R-S flip-flops look?

I tried to find on web something about counters with R-S flip-flops and I can't find anything.

How should they look?

As a particular counter I need one to obtain this sequence: 0, 1, 3, 2, 6, 4, 5, 7.

• What functions have you developed? Think of it as a synchronous design problem first then try to implement it in VHDL, as there are loads of examples out there for a RS Flip-Flop in VHDL, then all you'd need is some VHDL to link it up with your functions you derived by hand. – Dean May 26 '13 at 21:10
• Why don't you use a regular binary 3 bit counter and some logic to convert the numbers 2, 3, 4, 5 and 6 to 3, 2, 6, 4 and 5? – Andy aka May 26 '13 at 21:20
• There was a very similar question asked previously: electronics.stackexchange.com/questions/61117/… – The Photon May 27 '13 at 0:58

As Andy points out use a 3 bit (stage) binary counter and logic gates to get the sequence. As I suspect this is a homework question I'll leave you with the logic gates to work out for yourself.

You can build a S-R flip flop from simple two input logic gates. I have shown an S-R type using two NOR gates and a NOT S-R type using NAND gates. The problem is the simple S-R Flip flop (two cross coupled gates) cannot act as a counter (divider) by itself. Also if both inputs are HIGH (in the case of the S-R NOR flip flop) the output is uncertain.

By adding more logic gates around the S-R flip flop you can prevent this happening (resolve the conflict) and create a circuit capable of dividing an input pulse by two (a one stage binary counter). These circuits sense the current state of the outputs (Q and notQ) and 'steer' the next input pulse (clock) to the appropriate input on the flip flop causing the circuit to change state

A commonly used counter is the D type which uses TWO internally connected S-R flip flops. The 'not Q' output is connected to the D or Data input. By connecting up the D type flip flops as show below you can make a binary counter any length required. For this problem you need three stages (Binary 000 - 111, Decimal 0 - 7). All that you need to do is work out the logic required to change the binary count sequence to the sequence you require.  • Your diagrams show a T-latch and a bunch of D-flip-flops, but OP said he's specifically interested in RS-flip-flops. – The Photon May 27 '13 at 20:04
• I meant to put in a JK but the point I was trying to get across is that a simple RS flip flip without something around it isn't a counter per se. The circuit shows the internal structure that incorporated the R-S flip flop. The question asks about counts with flip flops - a D type contains two R-S type flip flops as shown in the internal circuit. It would be possible from the information I have posted to build his own S-R flip flop divider circuit using external logic gates using this design. I won't give a full answer to homework - just set him on the path. So a bit harsh to deduct points – JIm Dearden May 28 '13 at 11:50