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Lets say you have a very short DC pulse that has some sinusoidal noise in it. But the duration of the pulse is very short...maybe 0.5 µs. For an RC lowpass filter to respond quickly enough to begin filtering any portion of this pulse, we'd have to increase the cut-off frequency, allowing higher frequencies in.

My question is, does any technology exist which can respond faster than an RC low-pass filter? Maybe something digital?

enter image description here

schematic

simulate this circuit – Schematic created using CircuitLab

  • You do not know what the max voltage and/or amplitude of the pulse will be prior to it occurring.
  • You do know precisely when the pulse will occur.

Here's an example of a waveform where the duration of a pulse may be very short in duration but could benefit from noise removal. This is a CCD output waveform used in some old cameras. The data level can change with each period depending on how light hits the sensor. These can be pretty high in frequency depending on the sensor. (500+ kHz).

enter image description here https://www.analog.com/en/resources/analog-dialogue/articles/integrated-solutions-for-ccd-signal-processing.html

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    \$\begingroup\$ I'm confused by your term "faster-responding low-pass filter". Seems that a filtered output is desired before the signal is fully present. Do you know precisely the start time and end time of the pulse? Then a boxcar integrator might be useful...a result is available at the end-of-pulse. \$\endgroup\$
    – glen_geek
    Commented Apr 9 at 13:43
  • \$\begingroup\$ An RC filter does not settle instantly. If you increase R and C then the cutoff frequency will be lower but then it takes longer for the filter to settle. Yes, lets assume that we know exactly when the pulse will occur. \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 14:09
  • \$\begingroup\$ Hacky solution: add a CMOS in series to your capacitor and connect it's gate s.t. it is active when the signal is at around 90%. Make sure your capacitor is precharged -> your capacitor only filters while the signal is high. This is super hacky and application specific. Make sure to properly simulate before implementation. \$\endgroup\$
    – mlx11
    Commented Apr 9 at 14:23
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    \$\begingroup\$ @TimWilliams Editing that because it's causing more confusion. Lets say you don't know what the amplitutde will be but you do know the duration and precisely when it will happen. I'm going to edit in an example of a waveform that is exactly like this \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 17:10
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    \$\begingroup\$ For CCD signal processing, see articles.adsabs.harvard.edu/pdf/1980AJ.....85.1421H \$\endgroup\$
    – John Doty
    Commented Apr 11 at 0:29

5 Answers 5

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Not exactly clear what you're asking, but if you use nonlinear components or active devices, what I think you're asking is possible.

Consider this example circuit:

enter image description here

The transistor push pull has a bias current of 50µA thus its output impedance is around 250 ohms. At idle, it has the same lowpass response as a RC filter.

However, the transconductance of a BJT is proportional to current, which means the output impedance of this push pull is inverse proportional to current, and current is C1 dv/dt. Thus the cutoff frequency of this low pass filter is proportional to slew rate.

enter image description here

This means in case of a step+noise signal, it will quickly follow the step, then as voltage settles on the cap, output current falls and so does the cutoff frequency, which means it filters the noise out while settling faster than the RC.

This is the residual signal: it seems to become about as good as the RC rather quickly.

enter image description here

The circuit is only an example (biasing and DC offset compensation are left as an exercise to the reader) and would be quite useless on other types of signals.

You could also apply other types of processing: if you want to measure voltage at the flat top of the pulse and ignore noise, you could average voltage only when it is above a threshold. This can be done digitally, or you can use an integrator gated by a comparator. However an integrator doesn't compute average, it computes integral, so you still have to divide by the duration.

If the sine noise frequency is known, you can also use synchronized sampling (ie, sample when the noise is zero), or a notch filter to get rid of it.


About the CCD:

enter image description here

Here the sampling switch is synchronized with the pulse (the switch control signal is on the bottom plot). So when the pulse is present at the input, C1 charges through R1, and the RC filter reduces noise. What matters is the final value on C1, which is then digitized by the ADC.

It is not necessary to settle very close to the output voltage to a very low tolerance like 1 LSB, because if the sampling time window is known and always constant, and the cap starts at a known voltage (for example it was discharged previously by another switch shorting it)... then when the switch opens, the sampled voltage on the cap will be proportional to the input voltage, even if it did not settle to 0.00 something percent. So a correction factor can be applied, which only depends on sampling time window. In the case of a CCD, absolute accuracy is not needed, all that matters is that all the pixels have the same gain, and that is the case.

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    \$\begingroup\$ I'm essentially asking: "What is the best way to filter the sinusoidal noise from a very short pulse" \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 16:31
  • \$\begingroup\$ I'm very interested in your design but I also found this from TI: ti.com/lit/an/sboa011/… \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 16:33
  • \$\begingroup\$ It's the same thing with diodes instead of BJTs. Why do you want to remove the noise? You want to measure voltage at the top of the pulse, or something else? I mean if you know it is 5V already, why do you want to clean up the voltage? Where does the noise come from? What is its frequency? Is the pulse repetitive? Basically please give all the details you can. \$\endgroup\$
    – bobflux
    Commented Apr 9 at 17:06
  • \$\begingroup\$ I added an example of a waveform to the question with some clarification. I think this is enough information to describe the question adequately. I'm really just asking if there are filters that exist which have faster settling time than a typical RC lowpass filter. \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 17:24
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    \$\begingroup\$ @BobaJFET If the noise is sinusoidal, is it at one or more fixed frequencies? if so, you could use notch filters to selectively remove those frequencies and allow the pulse edges through. \$\endgroup\$
    – Hearth
    Commented Apr 9 at 19:17
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I'll opt for a high-level explanation of signal processing here, and suggest where to go for further reading -- whole curricula exist around this topic, let alone stacks of papers and books, so I won't begin to explain it in detail, but based on this, you can begin to explore what you need to know to receive whatever your signal is, as accurately as possible.

At the most basic level, we are interested in information. More specifically, what useful information is present, and what useless interfering information (noise) is present.

Information, contained in an electronic signal, manifests as amplitude, phase, frequency or timing, how many levels thereof, etc. Any aspect of the signal function \$x(t)\$ can encode information, and it is up to us to transform it into another usable form (such as binary data in a logic or computer system).

Information can be measured by the entropy of the signal: that is, how many states the signal can occupy, and how many (out of the available states) it actually reaches (and how often, and other statistics as we see fit).

Noise is also information: additional aspects of the signal \$n(t)\$ -- usually modeled additively so that we are receiving their sum \$x(t) + n(t)\$ and must discriminate the information of only \$x(t)\$ as well as possible -- which, if we measure the signal directly, will push the reading into other unintended states; we get uncertainty in our measurement, and our desired signal becomes diluted or overridden.

Our most basic tool to combat this, is statistics. Any aspects of the signal which are linear (for example, amplitude), if we make repeat measurements of that aspect and average them together, the noise averages out and we recover the signal. Unfortunately, a DC signal isn't very useful -- it encodes a fixed amount of information, a one-time signal, it is not a rate, a data flow -- and we also don't have an eternity to average over.

Further reading on information theory is recommended; the original papers by Shannon, Nyquist and et al. are very approachable, and foundational in this field.

Your first request, how to design a filter, can be described in this framework: a low-pass filter performs a correlation with the signal itself, effectively averaging it over a short time window. More specifically, the impulse response of the filter, can be seen as exactly the weighted average applied. That is, the output of a filter, is the convolution of the input signal and the impulse response.

Filter design, might therefore be understood as, choosing a suitable averaging window, such that the desired signal is maximized, and interference of given spectrum is minimized.

Your amended information suggests something a little different. It's not clear what, if any, noise will be present during the ref/data periods; and without a measure of this noise, as you can see from the above, it is impossible to obtain a perfect measurement of those levels. First we must define some dynamic range, signal-to-noise ratio (SNR), bit depth (ENoB), or bit error rate (BER), and we must define what the noise is, what is its nature: RMS amplitude, statistics if other than normal distribution, correlation to the desired signal, spectrum, and so on.

Notice that, if we simply RC (or anything else) filter the signal as-given, we can't simply "ignore" the clock glitch: it's spanned by the filter's impulse response and ends up as a term in the weighted sum; unless we have a really tight filter (short impulse response), but then we likely lose some signal in the process. There is also inter-symbol interference (ISI) as the ref/data levels bleed into each other, or (for longer impulse responses), between subsequent pulses.

(It's also not clear if you understand the purpose of the ref and data levels; but to be fair, on a more general level, we might only be concerned with a sampling window -- interpreting the first image as a square pulse windowing a general signal function, \$\square(\frac{t - t_0}{\Delta t}) x(t)\$ -- and we simply repeat that process as needed for each level being sampled. It's not clear from your question whether this was understood/intended, so I'm adding this to clarify just in case.)

This explains the leading nature of my comments: if the signal were perfectly described (frequency, phase reference, duration, amplitude, etc.), its information content would be zero: there is nothing to know about it, it is perfectly defined and we can just write down a constant anywhere later in our signal chain and say with utmost confidence that we have received the signal.

This reduction of information, can seem surprising to newbies -- surely you need an oscilloscope of at least so-and-so bandwidth to measure a sine or square wave of given specs, for example? -- But indeed, ideal periodic waveforms have a data rate of exactly zero, they are described by a small set of parameters and never change, so can be sampled arbitrarily slowly. Indeed, suppose we take a sample at incremental positions along the waveform, and take samples only occasionally (well less than one sample per cycle), well, if the wave isn't changing and our phase is exactly as desired, we can reconstruct any periodic waveform exactly, given enough samples to reconstruct it to some desired level of accuracy. This is called equivalent time sampling.

And, to be clear, it can still seem surprising to veterans -- the ability to pull signals deep out of apparent noise, is a testament to the robust encoding and detection schemes that channel-limiting modulations employ. With good enough correlation, we can go from ~Gbps WiFi in a noisy room, to mere 100s of bps (or less!) for high efficiency (BLE), long-distance (e.g. shortwave CW, LORA, etc.), and really long distance (e.g. Deep Space Network) communications. It's all about information, ultimately.

As for circuit ideas -- in the event that the noise is uncorrelated to the signal, and the signal is flat during the period it's nominally supposed to be flat, I would suggest a windowed integrator. Simply sum up the signal during the signal period, the noise averages out as well as it's going to during that period, and you can sample the result at your leisure -- a windowed integrator also doubles as a sample-and-hold element.

enter image description here

Preferably, the ADC would do this by itself: if you have choice of ADC, one with a sampling aperture comparable to the integration window will do more-or-less the same thing already. Some microcontrollers have ADCs with such a feature for example, say by way of selectable number of clock cycles holding the sample gate open. Other technologies do it intrinsically: the sigma-delta ADC is an integrating type, which rejects noise between the summing window and the ADC clock. (S-D ADCs are quite slow, though, so probably not applicable here.)

You could also sample very fast (use an ADC such that the signal plus noise is all within its Nyquist bandwidth), and average it down digitally. It can be easier to construct sharp filter kernels this way, or relatively trivial even, when it has to do with plain old gates, registers and summers (as you might use in an FPGA). Put another way, you can express the differential equation of the analog filter (such as the windowed integrator suggested above), as a discrete-time difference equation, and refine it further from there. (Often, this is a big burden -- you might need 10s or 100s of MSps here, and an FPGA -- at least, good luck streaming this into a CPU or whatever -- but other times it's part of the design, and a natural fit. Monolithic ICs for example can incorporate extraordinarily elaborate radio systems, largely in digital, with just enough RF/IF circuitry to round things out.)

Additional keywords for correlation circuits: mixer, analog switch, diode gate, reference clock, gating pulse, triggered timebase, etc.

Using a switch or mixer to blank out the glitches, and single out a suitably stable portion of the signal period, seems promising here.


Finally, the best answer is the question that didn't need to be asked in the first place -- that is, that obviates its need:

If there is an external and additional source of noise, address that first!

It's not clear if this is relevant in this case, but for general purposes, you should seek to reduce every possible source of noise, until it's due to the raw statistics of the signals in question, and the properties of the devices that make up the system. Once all noise sources have been reduced to minimum level, and largely physical in origin (e.g. optical shot noise, thermal Johnson noise), you will have maximized the SNR of your system, and can choose ADC accordingly, for example.

Noise analysis itself is an important and detailed topic, which I won't get into here, but EMC (electromagnetic compatibility) is likely also relevant, by way of accounting for or eliminating noise sources -- especially when correlated, e.g. clock bounce, related logic, etc.

The clock glitch is something of an example of this, I assume due to injection due to NMOS analog switches in the CCD, but perhaps also due to board layout issues (some of which may not be solvable, e.g. bondwire inductance to the CCD itself). Probing and analyzing these coupling paths is also not trivial, and so I won't go into detail, but to mention it as a jumping-off point.


For reference, as a more-or-less expert in EE, I might quote from months to years of engineering time, to design and build a CCD receiver of good to arbitrarily-high performance. (Well, maybe not arbitrarily so; but more to the point, I simply wouldn't quote at all, anything that involved, like, brand-new CCD chip design; that happens to be outside my experience, anyway.) On the low side, or maybe even less (weeks?) if an IC solution (such as in the commented ADI article) is acceptable, but more to say: not a trivial project.

I don't know what your overall capabilities are, but at least as a "novice to signal processing", I would expect this to require significant study, in addition to the analysis and engineering. If this is an academic context, it should probe an excellent learning project -- if perhaps for less-than-cutting-edge results, but with luck, or some guidance from faculty, industry, or team effort, you could well push the boundary of what's available today.

If in a professional context, make it clear to your employer/client that this will take more than just engineering work to complete, at least to more than "lashed together" standards -- which again, you might get lucky, but if you're doing this from scratch and need to do all the analysis and are crafting a custom signal chain yourself, that will take time to prove out. (Add to the above, analysis and testing methods; you may need signal generators and error counters to properly test out the system.)

Whatever the case, best of luck!

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For this case, rather than a filter you might use a comparator with the threshold set to below the noise. This would basically reshape the pulse, eliminating the noise. For 500ns pulses it would need to be a rather fast comparator.

Here's an example simulation: pulse reshape simulation

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  • \$\begingroup\$ This would only work if you know exactly what the max voltage of the pulse would be prior. \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 16:27
  • \$\begingroup\$ @BobaJFET Do you know? You commented that the pulse amplitude is 5 V, how much higher does the noise make it? You could maybe diode clamp it to limit the maximum, then you'd just need to make sure the reference is below the minimum pulse + noise voltage. \$\endgroup\$
    – GodJihyo
    Commented Apr 9 at 17:02
  • \$\begingroup\$ I'm going to redact that and say no because it's going to cause more confusion. You do not already know the amplitude of the pulse. Sorry for the confusion. I'm asking how you filter the noise from the pulse, not reproduce it with some other circuitry. \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 17:09
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    \$\begingroup\$ @BobaJFET So is this just an academic question then? \$\endgroup\$
    – GodJihyo
    Commented Apr 9 at 17:22
  • \$\begingroup\$ @godhihyo It's just an engineering question. \$\endgroup\$
    – BobaJFET
    Commented Apr 9 at 17:27
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If you know when exactly the pulse happens or - more generally - which portion of the time domain data you do and don't want to analyze, then just discard points you don't want.

I.e. take some points from the reference time and average these, then take points from the data plateau and average them. Ignore points from the signals spikes and transitions.

The fancy name for this trivial technique is boxcar integration as mentioned by glengeek in the comments.

As it is so trivial, it is likely that I may have missed a boundary condition of your problem that prevents this solution.

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  • \$\begingroup\$ Are you implying that you could sample X points from the pulse then average their values? \$\endgroup\$
    – BobaJFET
    Commented Apr 10 at 12:47
  • \$\begingroup\$ @BobaJFET yes exactly. Obviously choose the points such that they are on the plateaus of interest. \$\endgroup\$
    – tobalt
    Commented Apr 10 at 14:34
  • \$\begingroup\$ Now i'm wondering if there's an IC that does this. Basically a digital low-pass filter \$\endgroup\$
    – BobaJFET
    Commented Apr 10 at 14:48
  • \$\begingroup\$ @BobaJFET See ADCs like the ADS127L21 that have integrated programmable FIR and IIR filters. \$\endgroup\$ Commented Apr 10 at 16:54
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Here's a drawing of a TESS CCD video chain. Between pixels, U3 forces the signal input to U4 to V0, the virtual ground level. Once the reset feedthrough has passed, U3 turns off. The input to U4 then is approximately V0, the virtual ground level (but affected by broadband noise due to the short turn-off time). U4 buffers this. We then feed the signal through the DeInt path (U11) to the video integrator. This gives us an average of the (translated) baseline. When charge is injected to the output, we switch integration signs, feeding the integrator through the Int path (U12). Thus, the output of the integrator, U6, represents the difference between the average signal and the average baseline.

enter image description here

More details on line:

Focal Plane Electronics manual: https://github.com/TESScience/FPE/blob/FPE-7.0/Releases/FPE-7.0-revA/FPE.pdf

Full gEDA/ngspice/LaTeX project: https://github.com/TESScience/FPE/tree/FPE-7.0/FPE

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