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I'm designing a 150mmx88mm 4 layer board which has two buck converters, two relays and an Arduino Pro Mini. Maximum current is 4 Amps to drive a LED strip. The rise and fall times of the switcher is 30ns. I guess this board can be considered low/medium frequency. My stackup is Signal/Power - GND - Power - Signal. Now I need to choose prepreg thickness between inner and outer layers.

First of all, what is the default prepreg thickness in JLC PCB? Even though I didn't need controlled impedance I opened controlled impedance page and I'm faced with two free options: JLC04161H-7628 and JLC04161H-3313. The latter has much closer ground and signal plane but low dielectric constant.

Which stackup should I use? Is there any disadvantage of choosing thinner prepreg even for low frequency boards?

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  • \$\begingroup\$ The dielectric constants are the same as far as I can tell. Also your JLC041611 name isn't located on the linked page so, why don't you copy and paste an image of what your options are? \$\endgroup\$
    – Andy aka
    Commented Apr 13 at 11:41
  • \$\begingroup\$ I fixed the names, I don't know how they came out wrong in the first place. \$\endgroup\$
    – CaveScientist
    Commented Apr 13 at 11:44
  • \$\begingroup\$ If it's low frequency, the dielectric constant doesn't matter, because you aren't building transmission lines and you don't worry about capacitance \$\endgroup\$
    – Voltage Spike ♦
    Commented Apr 13 at 20:53

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There is AFAIK no direct correlation saying that thin prepreg is better for higher frequency. There are always trade-offs.

On impedance controlled boards, thinner prepreg will allow for thinner traces for a specific impedance, which may be beneficial in case of space restraints. Although, thin traces have higher resistance, which will cause greater losses. So in terms of RF, thin prepreg may not be beneficial.

On the other hand, with thinner prepreg, you get a thicker core. On a four layer PCB you typically have one ground- and one power plane on the inner layers. The interplanar capacitance between the two is a really good decoupling capacitor, working in your favor. The thinner the core, the higher the capacitance.

Another disadvantage of thinner prepreg is that the breakdown voltage between those layers is lower. So if you have any non-insignificant voltage on your board, that needs to be considered.

Which stackup should I use?

It is quite likely that it does not matter at all, unless you have any very specific requirements.

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  • \$\begingroup\$ Can't I use thick traces (0.5mm for signal and 1mm for power) and thin prepreg together? Then one of the drawbacks is eliminated. Also, the core is over 1mm in both cases, how many farads difference will 0.2mm make between layer 2-3? It's relatively small difference. But the relative difference of prepreg (0.1mm vs 0.2mm) is huge and probably affects the coupling of magnetic field of inductor on the layer 1 and ground plane on the layer 2. There is Line voltage at the corner of the PCB that's shortly routed from top and bottom layer, still is in contact with inner layers through the THT legs \$\endgroup\$
    – CaveScientist
    Commented Apr 13 at 17:03
  • \$\begingroup\$ @CaveScientist Sure you can use thick traces and thin prepreg. I was talking about impedance controlled lines (as a general description of what pros and cons exists for high frequency boards). The core thickness won't make much difference in terms on Farads (or rather, pF) but 20% thicker = 20% less capacitance. If you have line voltage on a part of the board, you are probably best off to remove the inner layers in those areas. \$\endgroup\$
    – Klas-Kenny
    Commented Apr 15 at 6:13
  • \$\begingroup\$ My stackup is Signal/PWR - GND - GND - Signal/PWR and the fastest edges are edges of SPI communication. The MCU on the center is Atmega328p. I want to keep loop inductance small that's why I plan to use 0.1mm dielectric compared to 0.2mm sicne it is free. The thing is, I have wide traces, 1.2mm for power, 0.5mm for I2C and 0.35mm for SPI. Will the capacitance increase too much if I use thin prepreg and corrupt messages or my messages are too slow to be corrupted by such prepreg difference? \$\endgroup\$
    – CaveScientist
    Commented May 5 at 12:33

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