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This question is from Example 9.6 of Razavi's book. Design of CMOS analog integrated circuits.
I will first outline my confusion regarding Razavi's solution and the clarification of the inequality equation mentioned in the citation, followed by presenting the pictures related to the question at the end. I am confused about this sentence.

With the latter choice, how high can \$V_X\$ or \$V_Y\$ go? If the gain of the op amp is large, the gate voltages of \$M_1\$ and \$M_2\$ swing negligibly. Thus, \$V_X\$ and \$V_Y\$ can arbitrarily rise from \$V_{CM} = V_b − (V_{GS3,4} − V_{TH1,2})\$ without driving \$M_1\$ and \$M_2\$ into the triode region

For clarity on the origin of this inequality equation, which represents the minimum output voltage required to keep transistor \$M_2\$ in the saturation region: $$V_{out} \geq V_b − (V_{GS4} − V_{TH2}) \tag{1}$$ comes from the following reasoning:
1: The requirement of \$M_2\$ transistor stay in saturation region is the inequality equation $$V_{ds2} \geq V_{ov2} \Leftrightarrow V_{d2} \geq V_{g2} - V_{th2} \tag{2}$$ 2: Due to the gate of \$M_2\$ transistor is connected to the output, we have $$V_{g2}=V_{out} \tag{3}$$ 3: Due to The drain voltage of \$M_2\$ transistor is equal to the source voltage of \$M_4\$ transistor, we have $$V_{d2}=V_{b}-V_{gs4} \tag{4}$$ Combine the equation \$(3)\$ and \$(4)\$ we will find that to satisfy the saturation region inequality equation (2) we need to have $$V_{b}-V_{gs4} \geq V_{out}-V_{th2} \Leftrightarrow (1) \tag{5}$$ which is equivalent to the equation \$(1)\$.
I have two questions here:
\$1\$:
I don't understand Razavi's reasoning

If the gain of the op amp is large, the gate voltages of \$M_1\$ and \$M_2\$ swing negligibly. Thus, \$V_X\$ and \$V_Y\$ can arbitrarily rise from \$V_{CM} = V_b − (V_{GS3,4} − V_{TH1,2})\$ without driving \$M_1\$ and \$M_2\$ into the triode region

Why if the gain of the op amp is large, the gate voltages of \$M_1\$ and \$M_2\$ swing negligibly?
\$2\$:
If his assertion that

"\$V_X\$ and \$V_Y\$ can arbitrarily rise from \$V_{CM} = V_b − (V_{GS3,4} − V_{TH1,2})\$ without driving \$M_1\$ and \$M_2\$ into the triode region"

is correct, then this implies that the variations in the VX level do not affect the VCM level, correct? If so, why does the previous paragraph asserts that

If \$V_{CM} = V_{b} − V_{TH3,4}\$, then \$M_3\$ and \$M_4\$ reside at the edge of the triode region and cannot tolerate any downward swing [Fig. 9.10(c)].

? Following the same logic, shouldn't the rise and fall of VX not influence the common-mode (CM) level as well? Or have I misunderstood something?" example 9.5 graph Quotation

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1 Answer 1

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  1. The virtual ground assumption is a good approximation when the amplifier has high open-loop gain. The gates of M1 and M2 will have little voltage swing because of feedback action. It's no different from the an inverting op-amp amplifier configuration.

  2. No, it means that, at a given common-mode level, the output voltage can swing upwards almost arbitrarily, only being limited by the compliance voltage of the PMOS current sources that are not shown in the picture. This is about the "upper-bound" of the voltage swing at nodes X & Y.

  3. This is about the lower bound of nodes X & Y. If they swing too low, M3 and M4 might be driven into triode region, thus not working as cascodes properly.

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  • \$\begingroup\$ Do you mean that under the condition \$V_{in,CM} = V_b − (V_{GS3,4} − V_{TH1,2})\$, the inequality \$V_{X} \leq V_b − (V_{GS4} − V_{TH2}) \Leftrightarrow V_{ds2} \geq V_{ov2}\$ no longer applies, but the under the condition \$V_{CM}=V_b-V_{TH3,4}\$, the inequality \$V_{X} \geq V_b − V_{TH4}\Leftrightarrow V_{ds4} \geq V_{ov4}\$ still applies right? \$\endgroup\$
    – Tong Su
    Commented Apr 19 at 20:01
  • \$\begingroup\$ I think I am kind of confused because in the previous example Example 9.5, the \$V_{in,CM}\$ level is equal to the \$V_{out,CM}\$, but in here, the \$V_{in,CM} \neq V_{out,CM}\$ right? \$\endgroup\$
    – Tong Su
    Commented Apr 19 at 20:06
  • \$\begingroup\$ I have just uploaded the picture for Example 9.5 to my question. The difference between the circuits of 9.5 and 9.6 lies in the fact that in 9.5, the input common-mode level \$(V_{\text{In,cm}})\$ is equal to the output common-mode level \$(V_{\text{out,cm}})\$, which is also equal to the gate voltage of transistors M1 and M2 \$(V_{\text{gM1,2}})\$. That is to say \$V_{In,cm}=V_{out,cm}=V_{gM1,2}\$,However, in Example 9.6, none of these equalities hold true, correct? \$\endgroup\$
    – Tong Su
    Commented Apr 19 at 20:18

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