I have an assignment that requires me to build an 7-bit CPU. I’m done with implementing some of the requirements that includes 4 8-bit registers (the requirements say I have to store the parity bit), the ALU. I also added the Program Counter and the ROM for the instructions to be written into.
I have to now write the instructions (8 of them) into the ROM as hexadecimal and that’s where I’m confused. The way I’ve seen people do it is define the 16-bit instruction. I was planning on defining it as 1 bit to specify whether the instruction uses immediate values, opcodes (3 bits in my case), 2 for source register and 2 for destination register, and then 7 bits for if I have immediate values.
I understand how to write them into the ROM but how can I implement the logic to assign an opcode to a specific operation?
For example, lets say I have an instruction “MOV Rd, Rs”, how am I meant to write the instructions into the ROM without basically hardcoding the bits for the source and destination register.
I hope everything I said makes sense. I’m very new to all this.
7-bit CPU
but the only thing discussed later that matches the number 7 is the immediate constant value in a 16-bit instruction. You have 8-bit registers and 16-bit instructions? So how did this become a7-bit CPU
? Also, I suspect you are confused. No discussion about whether this is a microcoded CISC or a pipelined RISC or ??? But when you writeMOV Rd, Rs
there are two problems. One is just a matter of an assembler generating instructions which are just hard-coded data to the CPU. Another is the decoding of those instructions in the CPU. What's the topic here? \$\endgroup\$