# Negative feedback amplifier

The following circuit diagram is from a book on electronic circuits. The Current source $$\I_s\$$ is driver of the amplifier. It was written that this amplifier has negative feedback. It seems that if the current $$\I_s\$$ increases a small amount in magnitude, voltage at the drain of the MOSFET $$\Q_1\$$ increases. Then the input differential voltage at the Opamp increases since $$\V_{BIAS}\$$ is constant. Therefore the output voltage of Opamp increases. This increases the driving voltage of MOSFET $$\Q_1\$$, $$\V_{gs}\$$ and this increases the output current $$\I_{o1}\$$ of MOSFET $$\Q_1\$$ as shown. Increasing $$\I_s\$$ seems to increase the differential voltage and the output current $$\I_{o1}\$$ rather than decrease or stabilize it. How can this be a negative feedback amplifier? The circuit is supposed to provide an output current $$\I_{o1}\$$ and $$\I_{o1} = I_s\$$. The current mirror is as such $$\I_{o2}=n∗I_{o1}\$$.

The circuit is shown below:

Reference:

Problem 10.71, page 823, Microelectronic circuits -Theory and applications, 7th edition, Sedra and Smith, Oxford university press, 2017.

How can this be a negative feedback amplifier?

The op-amp and the negative feedback keep $$\Q_1\$$'s drain voltage at a level that is precisely equal to $$\V_{BIAS}\$$. Whether this is regarded as some kind of functional amplifier is beyond the information you have provided. All that can be said is that $$\V_D = V_{BIAS}\$$.

From comments below this answer, this circuit is a single quadrant current controlled variable resistance rather than an amplifier (a loose term).

• If the opamp is ideal and its open loop gain is very high, then $V_D = V_{BIAS.}$ . I assumed the unideal opamp case with finite open loop gain. Apr 21 at 15:10
• That makes no difference in deciding whether it is functionally an amplifier or not. Your question = How can this be a negative feedback amplifier? Apr 21 at 15:35
• The confusion to see whether it is a feedback amplifier or not seems to be from whether if its the output current that is monitored with the feedback loop around the op amp or if the drain voltage that is monitored and it is supposed to be equal to $V_{BIAS}$. Seemingly, the output current increases initially but the Op amp seems to keep the drain voltage equal to $V_{BIAS}$ if its gain µ is high. This is where the negative feedback happens. Apr 21 at 15:40
• @AmitM quite correct but, for it to be functionally an amplifier (as opposed to incorporating an op-amp), it has to amplify something and, that's not clear. Apr 21 at 15:46
• The current driver$I_s$ is supposed to provide a output current $I_{o1}$ and $I_s = I_{o1}$. The current mirror is as such $I_{o2} = n*I_{o1}$ = Apr 21 at 15:50

It seems that if the current $$\I_s\$$ increases a small amount in magnitude, voltage at the drain of the MOSFET $$\Q_1\$$ increases. Then the input differential voltage at the Opamp increases since $$\V_{BIAS}\$$ is constant. Therefore the output voltage of Opamp increases. This increases the driving voltage of MOSFET $$\Q_1\$$, $$\V_{gs}\$$ and this increases the output current $$\I_{o1}\$$ of MOSFET $$\Q_1\$$

Yes, that is a correct observation.

Increasing $$\I_s\$$ seems to increase the differential voltage and the output current $$\I_{o1}\$$ rather than decrease or stabilize it. How can this be a negative feedback amplifier?

That is correct as well. However, note that we are not looking at the current, but rather at the voltage. The rationale behind this is evident: the Drain voltage is supplied to the positive terminal of the op-amp, which is then "compared" with the voltage at its negative terminal. By the way, no current is fed into the positive terminal.

As the $$\I_s\$$ increases by a small amount, the Drain voltage also increases. Consequently, the differential $$\(V_+ - V_-)\$$ of the op-amp becomes larger, and then the operational amplifier drives the MOSFET harder (more positive), causing the MOSFET to sink more Drain current and hence lowering the Drain voltage, thereby stabilizing it (i.e., remains at $$\V_{BIAS}\$$). Note that the op-amp output has changed to counter the change of the input.

The increase in the drain voltage is fed back to the amplifier, which then causes it to decrease. This is definitely negative feedback. Below, you’ll find a live simulation of the circuit. I’ve set $$\V_{BIAS}\$$ to 1.6 V. You can adjust the current limiter resistance through the slider on the right panel to change the current ($$\I_s\$$).

Observe that if you increase the current, the op-amp will adjust its output voltage to the gate of the MOSFET, maintaining the Drain voltage at $$\V_{BIAS}\$$ by means of negative feedback to prevent it from rising.

As a side note, one advantage of adding an op-amp to the ordinary current mirror circuit is that we can set the Drain voltage to a lower level. For example, the gate threshold voltage of the MOSFETs used in the previous circuit is 3.5V, but we can set the Drain voltage even lower than that. In the following simulation circuit without op-amp, the minimum achievable Drain voltage is no less than gate threshold voltage (3.5V). The op-amp version offers a wider voltage range across the resistor.

Current Mirror with Op-amp Current Mirror without Op-amp
The drain voltage will not change (of course, limits need to be observed) even if the drain current ($$\I_s\$$) changes The drain voltage changes with $$\Is\$$
The drain voltage can be set to any voltage within some limits It is difficult to set just any drain voltage if it is possible
The drain voltage is stable even the temperature of the transistor changes The drain voltage is affected by the temperature change of the transistor

Note: To those who are curious about why an increase in $$\I_s\$$ leads to a corresponding increase in the Drain voltage of the MOSFET, I’ll use a water and tank analogy to explain. Imagine a tank with a water faucet attached at the bottom. When you open the faucet partially (equivalent to setting the $$\V_{GS}\$$ slightly above the MOSFET gate threshold voltage), water flows out at a fixed rate (similar to the Drain current). If the tank isn’t replenished, the water level (analogous to Drain voltage) will drop. Now, consider filling the tank at the same rate (equivalent to $$\I_s\$$). In this case, the water level remains constant. However, if you leave the faucet unchanged (equivalent to maintaining the $$\V_{GS}\$$), but slightly increase the water filling rate (similar to a small increase in $$\I_s\$$), more water flows in than flows out. Consequently, the water level (Drain voltage) steadily rises.

• +1 for the insight that "we can set the Drain voltage to a lower level"; this is a unique phenomenon in op-amp circuits with negative feedback. You generally have a very deep way of reasoning. SE EE needs more people like you. Apr 22 at 14:12
• Thanks for the kudos. I greatly appreciate your upvote. :-) Apr 23 at 11:43

The circuit looks like a current mirror or a current controlled resistance.

For the moment, consider that $$\Q1_{V_{GS}}\$$ is the output with $$\I_s\$$ as the input. The op-amp and Q1 then form a transimpedance amplifier. Q1 diverts excess current from the noninverting input so that $$\I_D = g_m.(V_{GS}-V_{th})\$$. This stabilizes the gate voltage to the exact amount required to absorb the input current.
This is the negative feedback part.

The twist here is $$\V_{\text{bias}}\$$. The transimpedance amplifier is not really affected by $$\V_{\text{bias}}\$$, within limits. The drain voltage $$\V_{DS} \approx V_{\text{bias}}\$$ if μ is high enough. (Note: the reference for $$\V_{\text{bias}}\$$ must be Q1's source).

Q1 and the op-amp then also form a voltage and current dependent resistance, $$\r_{DS}\$$ that is presented to $$\I_s\$$. So: $$R_{in}=\frac{V_{\text{bias}}}{I_s}$$

Since Q2 receives the same gate bias a Q1, then if they are identical, $$\R_{out}=R_{in}\$$. Should be. Q2 does not benefit from the transimpedance amplifier, so someone more knowledgeable in the workings of FETs can confirm. I haven't tested it, but maybe some day.

PS: Hmm. Can it be called a resistance mirror?

• In the image I can see that,The feedback is connected to +ive input pin of opamp.May I know how this becomes a negative feedback system. Apr 22 at 5:15
• @Confused I explained that in my answer. Apr 22 at 6:35
• Q1 inverts the signal. Trace around the loop: V+ to Q1-G to Q1-D then back to V+. Increasing V+ in turn decreases V+. This defines negative feedback, not whether the input has a + or - sign Apr 22 at 10:39

For the moment, assume $$\I_S\$$ is constant, and is traversing Q1's drain-source channel. Then it is Q1's channel resistance $$\R_{DS}\$$ that will determine drain potential. $$\I_S\$$ is only responsible for "choosing" some gate bias potential common to both FETs.

The effective resistance of FET Q1's channel decreases as its gate potential $$\V_G\$$ rises, and vice versa, so with $$\I_S\$$ constant you can expect drain potential $$\V_D\$$ to vary in anti-phase with $$\V_G\$$. In other words, Q1 inverts.

Since inversion is handled by Q1, then for feedback to be negative, the op-amp itself must perform no further inversion, which is why feedback is applied to the non-inverting input. Feedback is 100%, meaning that the op-amp and Q1 together form a voltage follower with the relationship

$$V_D = V_{BIAS}$$

This stable condition establishes an exact gate potential $$\V_G\$$ necessary to obtain some specific channel state for Q1, and if Q1 and Q2 are well matched, and that same potential is applied to Q2's gate, then Q2's channel will have an identical state, giving rise to the claimed "mirroring" behaviour.

Of course, $$\I_S\$$ can be altered, modulated, which will result in $$\R_{DS}\$$ of Q1 varying. Q2's channel will adopt the same state, and you have a sort of current-controlled resistance, under control of $$\I_S\$$.

What we see here resembles the famous "brainstorming" sessions of the past where with all possible brain techniques they tried to reach the solution of the problem. Gradually, the picture is taking shape and it is time to sort out our thoughts. That is why I have proposed below a possible scenario in which I have shown how we can reveal the idea of ​​this clever circuit in a logical sequence.

# What is understanding?

By trying to understand an unfamiliar circuit we can recognize, analyze and explain familiar sub-circuits. For example, here we see how an op-amp implements negative feedback between the drain and the gate of the transistor, and as a result, the transistor is turned into a "diode" (voltage stabilizer).

But the finding that it was done so is not enough. For the purpose of true understanding we must find an answer to the question: "Why was it made this way?" So here we also have to answer more questions: "Why does the op-amp keep the drain voltage constant? What is the point? What does it accomplish? What problem does it solve?"

# What is this circuit?

It seems this clever circuit solution is a kind of improved current mirror. To see it, it is enough to turn Q1 with its gate to the gate of Q2 (the usual way to draw a current mirror).

# Simple current mirror

Since this is the improved circuit, it makes sense to want to see what the imperfect circuit was. This way we will best understand the meaning of the improvement.

The idea of the current mirror is very simple and intuitive: We cascade (daysy chain) two nonlinear converters - reverse (current to voltage) and forward (voltage to current). The result is a linear converter in which the direction of the current is inverted.

## Imperfect input current source

The converters are made by the same type of transistors as the first one is reversed by applying negative feedback between the drain and source. Let's see how.

Imagine a simple resistor-type current source is made by a 5 V input voltage source Vin and 1 kΩ resistor Rin (ammeter with such internal resistance), and its current is passed through the Q1 output (drain-source) part.

simulate this circuit – Schematic created using CircuitLab

It is possible since the Q1 input (gate) is connected to its output (drain), and Q1 adjusts its gate-source voltage so that to pass the current. Thus Q1 acts like a "diode" (voltage stabilizer) with a relatively constant drain voltage. Also, it can be considered as a "reversed transistor" in which the drain current is the input value and the gate-source voltage is the output value.

This voltage is applied to the gate of the "normal transistor" Q2 in which as usual, the gate-source voltage is the input and the drain current is the output. As a result of the cascaded reversed and normal voltage-to-current converters, a current mirror is obtained.

A problem: But as you can see from the voltmeter Vg and the graph below, the Q1's threshold voltage is too high - 4 V. It means that the Q1's drain voltage cannot go below this value, nor can the input voltage Vin. Simply put, the transistor starts working from 4 V up.

## Perfect input current source

We can solve the problem if we replace the imperfect current source with perfect ("ideal") Iin. By increasing its internal voltage, it overcomes the high drain voltage...

simulate this circuit

... and the current can start from zero.

# Improved current mirror

There is only a "small" problem in the above solution - there are no ideal current sources:-( So we have to look for another solution.

## Imperfect input current source

And it is very simple...

We can artificially reduce the threshold voltage almost to zero by amplifying the drain voltage before applying it to the gate. To do this, we can insert an op-amp in the negative feedback circuit between the drain and gate. Now the op-amp and Q1 act as an "ideal Zener diode" (voltage stabilizer) with a constant voltage Vd1 equal to Vbias (not to Vg). By maintaining this equality through the mechanism of negative feedback, the op-amp effectively adjusts the Q1's gate voltage so that its drain current is equal to the input current Iin.

simulate this circuit

For example, if we set Vbias = 1 V, the input current will begin flowing when the input voltage becomes 1 V (not 4 V as in the case of the simple current mirror above).

## Perfect input current source

Of course, we can combine the two remedies by replacing the imperfect input source with a perfect one, but such double assurance is not necessary.

simulate this circuit

Finally, let's examine the output part of the current mirror at a constant input current by sweeping the load resistance RL. As above, we can replace the resistor with an ammeter with the same resistance to simplify the schematic.

simulate this circuit

As you can see from the graph below, it is just a constant current source with horizontal IV curve.

# Resistances

Since the input (Rin) and output (Rout) resistance are indicated in the OP's schematic, let's see what they are.

The input resistance Rin looking into the Q1's drain is extremely low because it behaves as a diode.

The output resistance Rout looking into the Q2's drain is extremely high because it behaves as a current source (sink).

# Conclusions

• The circuit is a kind of improved current mirror.

• The role of the op-amp in this exotic circuit solution is to lower the threshold voltage of the MOSFET.

• For this purpose, the drain voltage is amplified before being applied to the gate.

• This allows (as @kaosad also said), the drain voltage to be very low.

How can this be a negative feedback amplifier?

Most generally: because if there was no negative feedback, the op-amp would get saturated at either rail and nothing useful would be happening. So, for the op-amp output voltage to be non-saturated, there must be negative feedback.

• Would the output terminal of Op amp be at the same voltage as its power supplies because there is no feedback loop around the op amp? Power supplies of the op amp are hidden in the diagram above. Apr 23 at 0:45

Question: How can this be a negative feedback amplifier?

Simple answer: Each feedback system has a loop between input and output. In the circuit under discussion, such a loop is clearly visible between the non-inv. opamp input and the drain node of Q1 because the voltage at this point is directly determined by the opamps output voltage.

More than that, due to the gain properties of the common source configuration of Q1 there is a phase inversion within this loop.

Hence, it is a loop with negative feedback.