# Why simulation of single NMOS/PMOS on LTspice has big difference with manual calculation using Level 1 Standard Parameters?

I am researching the mode of operation on PMOS and NMOS using Level 1 standard parameters. This is the information of the NMOS circuit to be designed.

Using transistor model level 1 parameters, calculate ID for an NMOS with the minimum W and L, VGS = VDS = 2.5 V and VSB = 0 V.

This is the result I have calculated using standard parameters manually.

The I_D calculated for my NMOS at minimum Width and Length (0.375u/0.25u) is 219.33uA. However, when I perform simulation on LTspice, the result seems to have a huge difference, compared to manual calculation.

This is my NMOS circuit on LTspice. Anyone can suggest how to solve this issue or any related settings so that the difference will not be so huge?

• how do we know you've used the same parameters (phi_F, lambda, etc) in the simulator as well? Commented May 4 at 7:28
• @Designalog, I have edited my question and provided the parameters that I have used in my question. Commented May 4 at 7:59
• Simply in LTspice, you have swapped L with W. You simply set L = 0.375 and W to 0.25 in LTspcie, but in hand calculation, you have used W = 0.375u and L = 0.25u. Id = 115E-6 * 1.5 * (2.5 - 0.43 - 2.5/2)*2.5 (1 + 0.06*2.5) = 406uA
– G36
Commented May 4 at 9:40
• @G36, I have swapped the value of L and W and posted the latest result in my edit. However, the result obtained is 425.009uA, which is much greater than my manual calculation (219.333uA) Commented May 4 at 10:20
• But it is much closer to my calculation 406uA
– G36
Commented May 4 at 10:21

I opened my book about electronic circuits and I found that those equations are used by SPICE to find the DC drain current using the LEVEL = 1 model.

In triode region $$\V_{DS} < V_{GS} - V_{T}\$$: $$I_D = K_P\: \frac{W}{L}\left( (V_{GS} - V_T)\:V_{DS} - \frac{V_{DS}}{2}\right)(1 + \lambda\:V_{DS})$$

In saturation when $$\ V_{GS} - V_{T }\leqslant V_{DS} \$$ $$I_D = \frac{K_P}{2}\: \frac{W}{L} \left(V_{GS} - V_T \right)^2(1 + \lambda\:V_{DS})$$

where:

$$V_T = VTO + GAMMA * (PHI - V_{BS})^{\frac{1}{2}} - PHI^{\frac{1}{2}})$$

In your circuit, the MOS will be in saturation ($$\2.5V \geqslant (2.5V - 0.43V) \$$ ), so we need to use the second equation. Therefore:

$$I_D = \frac{115\mu}{2}\: \frac{0.375}{0.25} \left(2.5V - 0.43V \right)^2(1 + 0.06 \:2.5V) = 425.009 \mu A$$

Exactly the same result I've got in LTspice and in QSPICE.

• Does that mean that we do not consider saturation due to velocity saturation, ie we do not consider Vdsat for this case? Commented May 5 at 8:18
• I'm not a specialist on this subject. So I do not know. But those equations describe the MOS LEVEL = 1 model.
– G36
Commented May 5 at 8:29

Your NMOS works in the saturation region, but you used the i_ds formula in the triode region, so the calculation is wrong.

Generally speaking, you can first determine which region the NMOS works in, and then use the formula for the corresponding region.

When I was a student, I found this method troublesome because it seemed like the way NMOS worked was discontinuous. Until I discovered the EKV model, which can give accurate results in both the triode and the saturation region, and has only one set of formulas.

The formula above is from a slides: An Introduction to the EKV Model and a Comparison of EKV to BSIM

When I am designing circuits, I feel that the EKV model is very useful and give accurate results. But this model is not usually taught in class. If you are a student, please continue to use the method from textbook. If you are doing research, it should be of interest to you.

Note:

n is called slope factor, and its default value in LTSPICE is 1. The real value is about 1.3 for NMOS.

kp = \mu * Cox is the intrinsic transconductance, as the same you used.

U_T is the thermal voltage, and is about 26mV at room temperature (27 degree).