enter image description hereenter image description here> Blockquote

In our lab, using digital trainer kit, we designed the 3 bit asynchronous counter using JK flip flops by connecting clock to pin 1, following this circuit:

We had three inputs that were made high, 1st input is preset, 2nd is clear, 3rd is J, K and we connected the pin 1 to manual clock.

When we turned on the kit, by keeping all the inputs as high, the output we got is 1 1 1 and nothing else, we didn't see other outputs.

What's wrong with our design?


  • 4
    \$\begingroup\$ Welcome, please draw a schematic and provide a photo of your wires, else your question is to unclear to be answered. \$\endgroup\$ May 15 at 14:39
  • \$\begingroup\$ I have attached the circuit diagram, in the trainer kit we have given Jk,preset and CLR as logic 1 \$\endgroup\$ May 15 at 15:10
  • \$\begingroup\$ What is the nature of the manual clock? \$\endgroup\$
    – John Doty
    May 15 at 15:40
  • 2
    \$\begingroup\$ @user14822524 - Hi, (a) Thanks for adding the schematic. Can you add a photo of your physical setup as requested in the earlier comment? (b) Where did that image come from? Please note that to comply with the site rule on referencing, we need you to supply a reference for any copied / adapted material that you put onto Stack Exchange. If it came from an online source, please add the website name + webpage title + URL (i.e. link). If it came from a book or other offline source, please look at the site rule for guidance & reference the source to the best of your ability. TY \$\endgroup\$
    – SamGibson
    May 15 at 16:26
  • 1
    \$\begingroup\$ @user14822524 - Thanks for adding that link to a YouTube video. However that's 29:09 minutes long. Can you give a specific timestamp in the video, please? Otherwise it will need someone to look all through that video to find where that schematic is found. TY \$\endgroup\$
    – SamGibson
    May 15 at 16:45

1 Answer 1


It is difficult to assess without showing your constructed circuit. To test the functionality, play with the counter in the Falstad simulator. Click the switch to manually clock the counter.

enter image description here

Keep in mind that the JK flip-flop in the simulator lacks a PRE (preset) input. However, it comes with a CLR (clear) input, which is active high. To make it compatible with your input (low to reset), I added an inverter.

Additionally, note that the switch requires a resistor (1kΩ in the simulation) to ensure the signal drops to 0V when the switch is open. In a real circuit, the mechanical switch may bounce during pressing or releasing, potentially causing the JK flip-flop to interpret it as multiple quick press-and-release events as separate actions. For more reliable results, consider using a clock generator.

  • \$\begingroup\$ I have added the circuit now, could you guys please verify? Here how to connect multiple pins to vcc? \$\endgroup\$ May 16 at 6:15

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