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The circuit appears on this site in Post #45 by Michal Podmanicky.

It is posted so that I can understand how the circuit works. It is not explained fully in the posted link. How does this circuit work? Please explain in detail.

enter image description here

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The operation in theory is quite simple. Please refer to the image below, which is the schematic as posted with my mark-ups in red (to identify components).

enter image description here

One Switching Cycle
Let's assume the circuit has been running for some time, so Vout has reached steady-state. Start-up behaviour, when Vout = 0 ie: C1 is completely discharged, is quite complex, and we can cover that later if you wish.

In the steady state, let's assume Vout is about 3 times input voltage.

To start with, let's start the explanation at the part of the cycle when D1 is still conducting but its current has fallen to a low level. During this time, T1 winding voltage is about 2x Vin with polarity dot negative. This means the voltage at the top of R1 is at -Vin, which is keeping Q2 turned off.

Next, T1 current falls to zero, and D1 turns off. T1 winding voltage falls to zero, so now voltage at top of R1 is at +Vin. This causes some base current to start to turn on Q2. As Q2 turns on, Vce begins to falls toward zero, which applies a voltage across the T1 winding, this time the polarity is dot positive. This causes the voltage at top of R1 to increase, causing more base current drive, which turns Q2 on harder - this is a positive feedback effect, which speeds up the turn-on of Q2.

At the end of the turn-on process, Q2 Vce = 0, and the voltage at the top of R1 is 3 x Vin; the base current into Q2 is set by this voltage and R1.

In the next phase, current builds up in Q2 collector via T1, during which time D1 is OFF (reverse biased, blocking a voltage of 3 x Vin). This continues until Q2 current gain is not sufficient to keep Q2 on, so Q2 beings to turn off. Transformer action by T1 now causes the winding voltage to reverse, which reduces the voltage driving the base current, which helps to speed up the reduction of base current to Q2, and hence speeds up turn-off of Q2.

At the end of the turn-off process, Q2 Vce = 3 x Vin, and the voltage at the top of R1 is -Vin (negative), so Q2 Vbe is also negative, which keeps Q2 off. D1 is conducting the current of T1 into the C1 and the load, and so the energy that was stored in T1 gets dumped into C1 via D1. During this state the current in T1 gradually falls toward zero. Just before it gets to zero, we are now back at the start of the cycle, as mentioned above.

Regulation of Vout
The cycle described above repeats for many cycles until the voltage across C1 reaches the point where Q1 turns on. This removes the base drive from Q2, stopping the switching of Q2 until Vout reduces to the point where Q1 turns off, allowing Q2 to turn on and start the oscillations again.

Basically: this is a discontinuous-conduction DC-DC converter with bang-bang control by Q1. Much of its behaviour is determined by T1 (turns ratio, magnetising inductance, and saturation current), and also by the applied input voltage. Output voltage would not be tightly regulated, and it would have significant ripple.

Regarding practical matters: I would not recommend using the transistors specified in the schematic for this circuit. The 2N3055 is far too slow, and the turn-on voltage of the 2N7000 is not well defined (can be anywhere from 0.8 to 3V). Also, 1.5V input voltage seems very low, particularly for the transistors mentioned.

The start-up process is more complex, because when the power supply is first turned on, Q1 is OFF, and D1 conducts immediately via T1 (since C1 is completely discharged), which causes the voltage across each winding of the transformer to become the same as Vin with polarity being dot positive. Base current is less than what is available during steady state, since voltage at top of R1 is only 2xVin; and when Q2 turns off the winding voltage does not reverse, since D1 clamps Vce to Vout. Since the voltage does not reverse, it is very possible that T1 core saturates after a few cycles. How the start-up process continues is then determined by whether or not T1 saturates. Regardless, at some point C1 charges up to at least 2xVin, and then the volt-seconds across the T1 windings can naturally reset to zero over one switching cycle.

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    \$\begingroup\$ Pretty nice description. And even in the case where the transformer core may saturate, which serves to more rapidly reach the point where Q2's base current is insufficient, the description remains accurate. +1 The dot arrangement for the transformer is key. \$\endgroup\$ Commented May 29 at 0:41
  • \$\begingroup\$ Thanks @periblepsis, I did change my answer to separate out the switching cycle, from the bang-bang regulation. I guess regulation can probably be slightly better than bang-bang, if one considers that Q1 is shunting base current from Q1. \$\endgroup\$ Commented May 29 at 0:56
  • \$\begingroup\$ Actually, I wouldn't expect "bang-bang" operation here: Q1 steals some current from Q2, hastening turn-off. It will first tend to increase Fsw, then turn it off completely. (The output voltage dependency on Vgs(th) is pretty gross though, hah.) \$\endgroup\$ Commented May 29 at 1:00
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    \$\begingroup\$ Incidentally, the average 2N3055 is epitaxial, comparable with MJ15020 style devices and etc. Switching behavior is usually alright. It wouldn't be suitable for the values shown, but a lower base-circuit impedance, and Fsw under 200kHz, would work fine. The real problem with 2N3055 is, you don't know what you're going to get, because literally anything (rated a few amperes) could fill the spec -- and most likely wildly exceeding it in the process! \$\endgroup\$ Commented May 29 at 1:05
  • \$\begingroup\$ @TimWilliams Thanks TIm, I haven't played with 2N3055s for about 40 years - the last time was when I built the old ETI-480 50W audio power amplifier for a friend back in the 80s. That was a rather unique design in that the output stage was common-emitter with a voltage gain of about 4, IIRC. \$\endgroup\$ Commented May 29 at 1:10

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