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Why when the Vgs is increased the rise/fall and delay time decreases?
Isnt increasing Vgs increases the Qg and this should increase the timing and not the oposite.

example
As you can see the timing at Vgen=10 V and Vgen=4.5 V are different even if the setup are the samelink to datasheet.
Thank you

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  • \$\begingroup\$ It's not clear what you're talking about. It would help if you would give an example of what you're asking from a datasheet or add more context. \$\endgroup\$
    – John D
    Commented May 30 at 2:11
  • \$\begingroup\$ @JohnD its done \$\endgroup\$
    – Tintin
    Commented May 30 at 5:10

1 Answer 1

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It's not so much that Vgs is increased, it's that VGEN is increased, while Rg stays the same. This more than doubles the current into the gate.

Note that the charge required into the gate terminal is not linear with Vgs, especially around the 'Miller Plateau' voltage. This will vary somewhat with Vdd, Rload and Id, so make sure you are comparing like with like if you want to try to match simulations with the datasheet specifications.

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  • \$\begingroup\$ "This will vary somewhat with Vdd, Rload and Id .." and the most one i guess temperature. \$\endgroup\$
    – Tintin
    Commented May 30 at 10:40
  • \$\begingroup\$ @Tintin no, temperature will have a small effect. Vdd affects the voltage the Cdg will be charged to, Rload affects the Miller gain, both much larger effects. Put a model of a MOSFET into a simulator and play with Vdd, Rg, Vgs, to get a feel for what is important, and what not so. \$\endgroup\$
    – Neil_UK
    Commented May 30 at 11:31
  • \$\begingroup\$ i will, can you tell me more about load and Miller gain please. \$\endgroup\$
    – Tintin
    Commented May 30 at 12:34
  • \$\begingroup\$ @Tintin the voltage gain of a mosfet is gm*RLoad. Miller gain is just voltage gain, but computed in order to see how much the Cdg is multiplied to get the effective Cgs. That Cdg has to be charged up to Vdd by current through the gate. That's what's responsible for the 'Miller plateau' on the gate charge graphs. \$\endgroup\$
    – Neil_UK
    Commented May 30 at 13:32
  • \$\begingroup\$ i did some search and now i see why "This will vary somewhat with Vdd, Rload and Id " and why "Vdd affects the voltage the Cdg will be charged to, Rload affects the Miller gain" the higher the Vdd and the higher the Cdg the larger the miller plateau; and and the lower the Rload value and the higher Ig the tighter the Miller plateau right. \$\endgroup\$
    – Tintin
    Commented May 30 at 15:51

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