# Why does a half-bridge amplifier output half the voltage?

From a hobbyist's perspective, I can't/don't understand why the amp output voltage is only half of the supplied voltage. I am wondering if there is a trick to overcome this.

This circuit schematic above (adapted from Electrical Technology: "Half H-Bridge Inverter – Circuit, Operation, Waveforms & Uses") illustrates a half bridge amplifier where the output voltage between points A and B changes from +6 V to -6 V. My question is, "Why does it not sweep between +12 V and -12 V since the power supplied is 12?

The transistors are MOSFETs.

• This question essentially asks for tuition on half bridge amplifiers, which are a well-documented technology with plenty of detailed free and high quality documentation already written on the internet to answer this question and much more. It's a Q&A site, rather than discussion forum, and can't be a personal tutorial service. I'm sure you're familiar with how the site works but refer to high-voted questions for examples of well-regarded questions. Thanks. Commented Jun 1 at 15:38
• Hardly, I did just that - where do you think the rest of us learn all this stuff? Unfortunately, this question is a couple of lines that expects mountains of effort in return. Research and self-learning are paramount in decent engineering. Commented Jun 1 at 16:12
• ”i am what you can call an autodidact” An autodidact in 2024 would do a web search and read up on whatever subject, and in this field, install a circuit simulator and do experiments. I suggest you do the same. Commented Jun 2 at 6:18
• I'm not refering to peak to peak, and transistor count has nothing to do with it.. I'm just reminding you to pay attention to the voltage references. If you have 0 to 12V and one end of the load is at 6V, there is no way you can get +12V or -12V on your load by connecting the other side of the load to 0V or 12V(no matter how many transistors you use to do it). Commented Jun 2 at 14:32
• Let me put it this way: you have a 12cm ruler and you put a screw at the 6cm mark. Doesnt matter where you put another screw in the ruler its never going to be 12cm away.. Commented Jun 2 at 14:34

You've labelled the potentials at either terminal of the voltage source as 0V and +12V, so in keeping with those, all potentials I quote will be with respect to the 0V node.

Node B has a potential controlled by the transistors, and will lie somewhere between $$\V_B=0V\$$ and $$\V_B=+12V\$$, depending on the state of the transistors.

There is a caveat to my next claim; the capacitor divider holds node A at half-way between the supplies, so $$\V_A = +6V\$$. The caveat is that the capacitors will charge or discharge, and $$\V_A\$$ will therefore change.

The capacitors charge and discharge via load $$\R_L\$$, and thus $$\V_A\$$ will vary at a rate heavily dependent on the time constant $$\R_L \times C\$$. Without negative feedback to control the transistors, and endow them with near zero output impedance, transistor channel resistance will also play a role.

In any case, the claim that $$\V_A=+6V\$$ is therefore only valid if the frequency of the voltage signal at B is high enough that variations of $$\V_A\$$ are negligible. Under this condition, where $$\V_A\$$ remains approximately constant at $$\V_A=+6V\$$, the potential difference $$\V_B-V_A\$$ across $$\R_L\$$ will be constrained as follows.

When $$\V_B=0V\$$:

$$V_B - V_A = 0V - (+6V) = -6V$$

When $$\V_B=+12V\$$:

$$V_B - V_A = (+12V) - (+6V) = +6V$$

Therefore, at frequency, the voltage across the load will vary between -6V and +6V. Note the italicised word "across", to indicate that this is a potential difference, not an absolute potential.

It is worth considering the consequences of an extremely low frequency of signal at B. If given a long enough time to charge/discharge, then the above treatment will not be appropriate. For instance, if B is held at $$\V_B=0V\$$ for a long time, much longer than $$\R_L \times C\$$, eventually the upper capacitor will charge to the full 12V potential difference, and the lower capacitor will discharge completely, to 0V. Therefore $$\V_A=0V\$$.

Then, immediately following a transition to $$\V_B=+12V\$$, and before $$\V_A\$$ has time to change, the potential difference across the load will be:

$$V_B - V_A = (+12V) - 0V = +12V$$

Now, with B held at a fixed $$\V_B=+12V\$$ for a long time, the capacitors will charge/discharge to produce the state $$\V_A=+12V\$$ also. Then, following a transition to $$\V_B=0V\$$, the load will suddenly have this voltage across it:

$$V_B - V_A = 0V - (+12V) = -12V$$

This means that the voltage across $$\R_L\$$ varies between +12V and −12V, twice as far as with a high frequency signal at B.

This behaviour is easy to observe in a simulation:

simulate this circuit – Schematic created using CircuitLab

Voltage source V1 is a square wave representing the source of potential at B set by the transistors. It varies between 0V and +12V as you would expect from those transistors, and at high frequency (1kHz), this is the behaviour of the system:

You can see $$\V_A\$$ (orange) varying only very slightly, and the load voltage $$\V_B-V_A\$$ (brown) goes between ±6V.

This is what happens when V1's frequency is low enough (2Hz) that the capacitors are able to charge/discharge almost completely within one cycle:

The main features to note here are:

• The charge/discharge curves are clearly visible
• $$\V_A\$$ is no longer constant, since the capacitors have ample time to charge/discharge before input $$\V_B\$$ changes state
• Load voltage (brown) reaches nearly +12V and −12V
• Load waveform is no longer a good reproduction of the input

The problem with this design is the use of capacitors to hold A somewhere near +6V. With a fixed potential at A, the voltage across $$\R_L\$$ can't have a greater amplitude than the signal at B.

If you need a peak-to-peak voltage of 24V across the load (without using a 24V suppy), regardless of frequency, then you must control potential, explicitly, at both ends of $$\R_L\$$. That is, when $$\V_B=+12V\$$, then you require $$\V_A=0V\$$, and vice versa.

This requires replacing the capacitors with another push-pull pair, making the system a full H-bridge, not a half-bridge:

simulate this circuit

CircuitLab doesn't have IGBT symbols, Q1 to Q4 are supposed to be IGBTs. Q1 and Q2 explicitly set $$\V_A\$$, while Q3 and Q4 control $$\V_B\$$ as before.

If you arrange things such that $$\0V < V_B < 12V\$$, and $$\V_A = +12V - V_B\$$ (both therefore lying between 0V and +12V), then you have this voltage across $$\R_L\$$:

$$V_{RL} = V_B - V_A = V_B - (+12V - V_B) = 2V_B - 12V$$

That's a potential difference varying between −12V and +12V (24V peak-to-peak) for $$\V_B\$$ going between 0V and +12V (12V peak-to peak).

• Simon thank you for the long answer but we are going to agree that the half bridge topology doesnt have a frequency limitation and that it is the transistor what limit frequency, and another remarque in your circuit the capacitors were non polarised with a high capacity 1mF so Commented Jun 2 at 11:03
• @Tintin So what? Commented Jun 2 at 14:33
• @Tintin I've explained why the half bridge won't provide more than 12V pk-pk across the load, why the capacitors might cause more than 12V pk-pk, and how to produce 24V pk-pk across the load. All your questions answered. Commented Jun 2 at 14:37
• Simon the word "Claim" is confusing, in the firstS paragraph of your answer i felt like you did compared the half bridge to a relaxation oscillator, then you did bring the effect of frequency here you lost me because i know that half bridge are not affected by frequency. Anyway so +-6 has to do with the capacitors is that what you are saying? Commented Jun 2 at 16:19
• @Tintin In your circuit above, fix C to whatever value you’d like and drop the switching frequency to say 0.1 Hz. Does it behave the same as for 10 kHz? If not, it’s frequency dependent. Commented Jun 2 at 21:34

Here is what a half-bridge amplifier output might look like. The peak voltage at the output will be V. A multimeter will measure RMS or an approximation of RMS.

simulate this circuit – Schematic created using CircuitLab

• Mattman let assume that +V is 12v and -V is 0(ground) the speaker or where the arrow is indicating is oscillating between +6v and -6 isnt? Why not +12v and -12v ? Commented Jun 1 at 16:44
• @Tintin In that scenario the speaker would see +12 V and 0 V at the extremes and would be very unhappy due to the DC average current in the coil. If AC coupled, there would be no DC current, but then the capacitor's average voltage would be half the supply limiting the peak voltage across the speaker to half of the supply voltage. If you wanted the speaker to see +12 V and -12 V you would need a FULL bridge. Commented Jun 1 at 17:06
• Think of the transistors as variable resistors. When Q1 is 0 ohms and Q2 is infinite, you get +V out. When Q1 is infinite and Q2 is zero ohms, you get -V out. Other ratios will give you intermediate voltages, but you can never get a voltage outside the range of +V to -V. Commented Jun 1 at 18:33
• @JohnD " but then the capacitor's average voltage would be half the supply limiting the peak voltage across the speaker to half of the supply voltage" so it is the capacitor what "split" the voltage? "If you wanted the speaker to see +12 V and -12 V you would need a FULL bridge" am trying to understand very well half bridge topology. Commented Jun 1 at 19:00
• @Mattman944 i know that transistors are electronics switcher means it is conducting or inerumpting a potentiel. Let me ask you a question when the Q1 is open non conducting what are the Q2 is conducting? Because be the ammateurs/ hobbysits we imagine the traject of current every time we are looking at a circuit and its behaviour. Commented Jun 1 at 19:08

Think of the output stage of the amplifier as a voltage divider. Consider all possible options for:

• powering the divider,
• connecting it to the divider's output.

# CircuitLab experiments

This is only a specific circuit implementation, but behind it there are basic ideas (concepts) that we should understand. I propose to do it through highly simplified DC equivalent circuits.

In these conceptual schematics, we can represent the load RL with a voltmeter to monitor the voltage across it. But since usually the load has a relatively low resistance (for example, 1 kΩ) and consumes current, we can set such an internal resistance to the voltmeter and denote it by RL. Figuratively speaking, this will be a "visualized resistor load" RL.

To see the current, hover the mouse over some of the devices.

## Voltage sources

The simplest way to represent the amp output stage (the two transistors supplied by the DC source) is by a varying DC voltage source Vout that can vary its voltage from zero to 10 V. Here I have assumed that the voltage changes linearly in order to use the CircuitLab DC Simulation. In your circuit, the voltage is pulsed, but this difference is not essential for the answer to your main question, why the voltage on the load does not change to the supply voltage. Finally, we may consider this case as well.

So, the load has two terminals and you want to apply (and change) the voltage between them (across the load). It is easiest to fix the voltage of one terminal - 0, 5 or 10 V, for example.

Load to ground: Let's first connect the load (the black voltmeter probe) to ground.

simulate this circuit – Schematic created using CircuitLab

So in this initial case, the voltage across the load is positive and varies linearly from 0 to 10 V.

Load to V+: But the ground is a relative concept. So we can connect the right load terminal (the black voltmeter probe) to any point, e.g. the maximum voltage V+ (10 V).

simulate this circuit

Now the voltage across the load is negative and varies linearly from -10 V to 0 V. This is because the V+ voltage is subtracted from Vout (in series fashion, in the loop Vout - V+ - VL) and the result is a negative voltage across the load.

Load to V+/2: Let's finally connect the right load terminal to the middle (5 V) of the maximum voltage V+ (10 V).

simulate this circuit

When Vout varies from 0 V to 5 V, the voltage across the load is negative, and varies linearly from -5 V to 0 V. Then, when Vout varies from 5 V to 10 V, the load voltage is positive and varies linearly from 0 V to 5 V.

So, if you choose 5 V, and change the voltage of the other terminal in the entire range 0 ÷ 10 V, the difference applied to the load will change from -5 V to 5 V. Thus we have obtained a bipolar output within the limits of the supply voltage.

## Potentiometers

In electronic devices, the voltage source Vout is usually implemented by two regulating devices (transistors) connected in a voltage divider configuration ("half bridge"). They change their "resistance" in the opposite direction (complement each other). We can model this with a potentiometer P supplied by the voltage V+. Now we can repeat the experiments above by linearly moving the wiper up. Thus we linearly increase the potentiometer's transfer ratio K = r2/(r1 + r2) from 0 to 1.

Load to ground corresponds to Schematic 1.1 above.

simulate this circuit

Load to V+ corresponds to Schematic 1.2.

simulate this circuit

Load to V+/2 corresponds to Schematic 1.3. We can use the same 1 kΩ potentiometer P2 with K = .5 (the wiper is set in the middle). This configuration is a prelude to the full bridge at the end.

simulate this circuit

## Split supply

To get a bipolar output in the above schematic, we "raised" the right end of the load by 5 V. But we can achieve the same effect if we "drop" the left end of the load. For this purpose, we need another but negative voltage source V- of -5 V. This connection of two sources in series is known as a "split supply". The name comes from the fact that, figuratively speaking, we have "split" a 10 V source in two. Note that the overall voltage is as above 5 + 5 = 10 V.

simulate this circuit

Vout and VL change within the limits of this voltage.

## OP's circuit

This idea is further developed as an AC version in the OP's circuit where the two voltage sources are replaced by charged capacitors C+ and C-. Their capacitance is large enough so that they fail to significantly change their charge when the load current flows through them. To explore them in a DC fashion, in the conceptual circuit below I have replaced them by voltage sources (batteries). Note that they have some low internal resistance to avoid short circuiting.

simulate this circuit

In this application, Vout is pulsed between the two extreme values:

Vout = 10 V

simulate this circuit

Vout = 0 V

simulate this circuit

## Full bridge

To make the voltage across the load change from -10 V to 10 V, we can apply a clever trick - instead of keeping the voltage of the right load end fixed, we can change it simultaneously and in the opposite direction. Figuratively speaking, the ground becomes mobile and "moves" in the opposite direction.

We can model this trick in the conceptual Schematic 2.3 by moving the potentiometer wipers in the opposite direction.

Vout1 = 10 V, Vout2 = 0 V: For example, if you raise the P1 wiper to V+, I drop the P2 wiper to ground.

simulate this circuit

Vout1 = 0 V, Vout2 = 10 V: And vice versa, if you drop the P1 wiper to ground, I raise the P2 wiper to V+.

simulate this circuit

Let's now realize what we are actually doing with this trick. By reversing the right terminal with 5 V, we are actually adding 5 V to the initial 5 V voltage change of the left terminal. This is because the two voltages applied to the load terminals are subtracted in series fashion in the loop (which acts as a subtractor). So, when the right voltage changes in the opposite direction, it is actually inverted and the subtractor becomes an adder. Or more figuratively speaking, the voltage on the right load end assists the voltage on the left end in its desire to change the voltage across the load.

# Enhancement

I have also created an enhanced version of this answer in dialog with artificial intelligence.

• The question was closed as "This question needs to be more focused. It is not currently accepting answers". I honestly don't know what the policy is on this but, by proceeding to greatly expand a brief 5-line list answer into a very long answer, it does read like you're disregarding that closure. I would have expected the answer to be left 'as was' until the question is re-opened. Otherwise, surely it's (effectively) answering a question that the community elected not to answer. Commented Jun 1 at 21:11
• You've sure misread me for excitement and I'll try to live up to a bit of selflessness :-) You're relishing the long learner discussions so, yep, chat's your way forward. Have a good one... Commented Jun 2 at 17:52
• Thank you Cyril 🤝 Commented Jun 2 at 23:13
• @Circuitfantasist, "everyone will benefit from it" Except me and you :-) You'd drive me mad with your multi-page "now once upon a time..." essay answers and I'll irritate the life out of you with my shorter stuff you'll think has got 90% of anything worth reading missing. But I do appreciate the friendly sentiment and wish you well as always (raises imaginary pint glass and waves imaginary salt'n'vinegar crisps in your imaginary direction :-D ). Commented Jun 5 at 19:17
• (You might remember us talking this over before.) I had years learning practical engineering and business in a large company, from/with a real mix of people and disciplines, designing/working medium-volume prod'n. I recall so many stand-out experiences of people who could express an idea or explanation in a few words or a longer description that was easy to recall and brought it to life. Getting that balance of vivid, useful and succinct gives them the building blocks to digest, to use later when ready to explore deeper stuff. Give them the whole subject and you lose them before you start. Commented Jun 5 at 20:20