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I am trying to design a soft-start circuit for one of my projects which has a relatively large resistive load (~1MOhm). I found the following example circuit from an answer for a previous post (12 V Soft-Start circuit) which works well for a low resistance load (24 Ohm):

enter image description here

However when I subsequently increase the load resistance (R2) beyond 1kOhm there begins to be a noticeable initial voltage through R2 which becomes very significant at the load resistances I am interested in (simulated in CircuitLab with a 1ms step size).

enter image description here enter image description here

While the soft-start behavior is maintained, the voltage spike is not compatible for my application.

I would like to find an explanation for this behavior and be able to eliminate it in an updated circuit design. My initial thoughts are that even for the initially low resistive load such a 'spike' is still present, but its magnitude and length are so small it doesn't show up in the simulations. Perhaps this is due to an initial time constant associated with the RC section C1 and R2. However, attempts to lower C1 and subsequently adjust the values for C2 and R1 lead to significantly decreased soft-start ramp times (undesirable).

My current understanding of how this circuit functions is that the values of C2 and C1 need to be appropriately sizes to have Vgd less than the threshold value (here Vt = 3.3V). The time constant of the soft-start is set by R1 and the series capacitance of C2 and C1 (approx. C2R1 minus C1R1). The apparent time constant of the initial voltage spike (when R2 is increased beyond approx. 1kOhm) appears to be proportional to C1*R2. It is unclear to me how the component sizes are affecting the magnitude of the voltage spike however. The simulations show that the gate voltage experiences a similar spike when the switch is closed as well. Any advice and input would be greatly appreciated.

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  • \$\begingroup\$ Do you need to limit the peak start up voltage? does it have to be a linear ramp? If not, what time constant are you expecting? If so, what is the target slew rate? \$\endgroup\$
    – MOSFET
    Commented Jun 7 at 3:13
  • \$\begingroup\$ The initial current through the load needs to be as low as possible, but voltage spikes of up to 3V could be tolerated from my testing. A linear ramp is not necessary, but a time constant on the order of 1-3 seconds seems right. Target slew rate would be ~5V/s \$\endgroup\$
    – Curious
    Commented Jun 7 at 13:54
  • \$\begingroup\$ Do you need the full 12V across the load? or can you tolerate 11V? Or, do you have a 15V power rail? \$\endgroup\$
    – MOSFET
    Commented Jun 7 at 14:07
  • \$\begingroup\$ Some voltage drop across the soft start portion of the circuit would be alright, could use up to a 20V rail \$\endgroup\$
    – Curious
    Commented Jun 7 at 15:12

2 Answers 2

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The "spike" is caused by direct coupling through the two capacitors.

I'm not even sure what C1 is supposed to be doing. The post you linked to says something about making the voltage ramp linear, but this is a feature you may need to give up, by removing it.

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This should get you a decent ramp over most of the range (circuit 1) with some rounding at the top. The second 2 circuits mitigate the rounding effect.

schematic

simulate this circuit – Schematic created using CircuitLab

The capacitor and "Rset" governs the slew rate for each circuit.

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