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So a discussion between my colleagues surfaced surrounding via stitching as we typically do a copper pour on the whole PCB, but then we also stitch it all around with hundreds of vias (see picture).

The thing is: a conversation arose if it was beneficial at all as when we look at “commercial/professional” production boards we have never seen an ultra perforated one, at least at the levels we are doing. Not only that, but I've grown a “anything in excess causes harm” mentality when it comes to engineering, and recently I've learned that it adds an ever so small inductance to the power lines.

Some small excuses were given, such as prices when it comes to production lines (I guess having to drill 1000 holes into a small 100×60 mm design per board must be unpleasant for the guy who upkeeps the drills) or time to production, but these are insufficient answers for me.

I've seen other answers, but they're seemingly talking about via stitching in small amount, not about turning your layout into cheese. I've also done it, but now I'm generally curious if it's making my design worse, if it just ends up being pointless (as I've seen simulations on YouTube where more than 3 vias ends up saturating the results), or if it actually improves the design in an EMI/EMC way at the expense of some other resource.

I left an image to exemplify, also disregard the silkscreen being all over the place the board had to shrink 3-4 cm's in less than a day or so.

Stitching

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    \$\begingroup\$ What exactly are you trying to solve with all that stitching? If you are worried about emissions of inner planes, stitching will often be done on the edge of the board. Besides that, stitching can be used for thermal/power reasons, but stiching a whole plane doesn't seem useful to me. \$\endgroup\$
    – Wesley Lee
    Commented Jun 10 at 19:08
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    \$\begingroup\$ Is there still a power plane left with all these holes? \$\endgroup\$
    – bobflux
    Commented Jun 10 at 19:13
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    \$\begingroup\$ The distance between vias is like 3mm? Is the board handling 10 GHz RF? \$\endgroup\$
    – Justme
    Commented Jun 10 at 19:13
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    \$\begingroup\$ This is a really good question for people like me who stay far, far away from GHz. I'm learning something new. Thanks for asking it! (Already +1 the question.) \$\endgroup\$ Commented Jun 10 at 21:45
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    \$\begingroup\$ If you search for multi-GHz radio modules, you'll find a lot of vias, for example this. But only in the RF section. \$\endgroup\$
    – jpa
    Commented Jun 11 at 8:03

4 Answers 4

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The comment by user Justme ("Is the board handling 10 GHz RF?") gives you the answer. The necessary spacing between stitching vias is proportional to the wavelength of the highest frequency signals in your board. If you are working with audio signals or even 100 MHz networking signals, stitching vias can be spaced far apart, and you won't see many used. If you are working with high frequency RF, then stitching vias must be spaced closely, and you will see fully stitched boards in commercial products at these frequencies. In my own work on fiber optic transceivers working at up to 25 Gbps, we placed essentially as many stitching vias as we could find room to fit (but given the limited space in a transceiver there were never big open spaces to be filled with them).

As a rule of thumb you might want to space your vias by 1/8 or 1/10 the signal wavelength.

What is the downside of making your pcb turn into cheddar cheese?

  • Cost. Drilling more holes wears out the drill tool faster, increasing costs. Also it provides more possible points of failure for the plated-on copper, reducing (by a very small amount) yield.

  • Every drill hole takes up space on all layers of the board, making that area not available for routing or component placement.

If the stitching via density isn't taken to an extreme, I don't expect it to reduce the conductance of power plane layers significantly, but of course you should evaluate the power integrity of your design yourself and not rely on a general rule if you don't have to.

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    \$\begingroup\$ You may also put blocks of via stitching simply for current handling or thermal reasons, too; this is what I personally end up using large arrays of closely-spaced vias for most often. \$\endgroup\$
    – Hearth
    Commented Jun 10 at 19:32
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    \$\begingroup\$ @Hearth, sure, but I would call those "thermal vias" or "current management vias" depending on their purpose; they wouldn't be "stitching vias". At least in my work, "stitching vias" refers to vias used to tie ground planes together to avoid EMC issues. \$\endgroup\$
    – The Photon
    Commented Jun 10 at 19:35
  • \$\begingroup\$ @Hearth i guess we also see that near mosfets for example on motherboards, although for thermals and current we already knew the use case \$\endgroup\$
    – Imeguras
    Commented Jun 11 at 10:22
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    \$\begingroup\$ @Imeguras It's Swiss cheese that is know for having lots of holes, not cheddar cheese, which normally has no voids ;) \$\endgroup\$ Commented Jun 11 at 12:29
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    \$\begingroup\$ @AndrewMorton uh, im from portugal so i find that particularly funny but now that I think of it you are right \$\endgroup\$
    – Imeguras
    Commented Jun 11 at 14:18
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Because those vias cut into other planes. Sure, you don't put any where you have to route traces, but they also mean that your power plane has lots of gaps in it, and might not be a very effective plane. Historically, there was also commonly a charge per via, so more vias made your PCB more expensive, but that's not the case very often anymore.

And most of all: there's not really any need for such thorough stitching. If you have EMI problems, just put stitching where it's needed. For GCPWG, you only need to stitch along each side of the trace. For simply ensuring you have good ground continuity, a handful of scattered vias are enough, perhaps combined with a few blocks of densely-packed ones somewhere out of the way. You certainly don't need to cover the entire board with vias unless you're doing something particularly unusual.

The only time I would use vias that densely packed is when I need to for some reason. If I need to get very high currents between layers and via resistance or inductance is too high to use just a few, for instance, or if I need to get as much heat as possible from a power device on one side of the board to a heatsink on the other. But those would almost never cover the entire board, just the sections of it that the current or heat in question needs to pass through.

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    \$\begingroup\$ Stitching vias in big ground/power regions are helpful to avoid creating resonant structures that might respond to even a small leakage between vias if you only placed vias around the perimeter. \$\endgroup\$
    – The Photon
    Commented Jun 10 at 19:32
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I'm going to put a plug in here about careful EMI/EMC design for PCBs. As other answers have noted, stitching vias are used for boards with high-speed signals. Why? When you're working with high-speed or RF signals, one of your main concerns is impedance matching your trace to your load to minimize loss and reflections. A typical high-speed PCB trace has a specific width and distance to the ground/reference plane to set the impedance of the signal path. The signal will flow along the signal trace, and the return current will flow through the reference plane. Even when you have a reference plane, you should always be asking yourself, "where exactly does the return current flow?" The return current will follow the path that minimizes the loop inductance. If you have a reference plane directly under your signal plane (i.e., microstrip), the return current will flow directly under your trace.

Now, if you have a high-speed signal that runs through a via, your via will become an impedance discontinuity and will result in some additional loss. The bigger problem with this, however, is the return current. If your signal changes layers, your reference plane needs to change layers as well to minimize loop inductance and keep the impedance changes minimal. An ideal signal via will have a ground stitching via as close as possible. Your goal here, is to minimize the loop inductance of the signal and return current path. Some simulations show that multiple stitching vias around a signal via improve impedance matching, but I've never seen a case where more than 4 stitching vias per signal via made a noticeable difference, and even 4 is stretching it as high as 10 GHz.

Bottom line, if you want good signal integrity and EMI/EMC performance, your best bet is to carefully plan out the signal and return current paths for each trace that minimize loop inductance. This will naturally include stitching vias where they are needed. Adding them randomly throughout the board or around the edges of the board won't provide any functionality if you don't actually have currents or heat flowing in those areas, and will only lead to more expensive boards that take longer to build.

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Unless you are having issues in the GHz+ range, you probably don't need to stitch. Stitching is usually reserved for RF applications. It enables return currents to flow between planes and equalize voltages that may exist between them. Vias are a few nH, paralleling them drops the impedance even further and equalizes the voltage more.

Vias have a cost, they make the design more expensive. To most of us this wont matter because the PCB house will eat the cost, but if the design approaches a certain limit (depends on the PCB house) many of them will add a surcharge.

If you are producing millions of boards, it will add a significant amount of time because if the drill has to spend -say- 1ms then that will add 1000s of time to the project, so simpler is better.

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