I have been having a hard time finding out how to drive 32 gate drivers for SiC MOSFETs from a single function generator signal of 5 V.
My function generator is a Keysight 33500B. I'm using Genesic 1200 V SiC MOSFETs (G3R12MT12K) and cree gate drive boards (CGD15SG00D2). I'm designing a two series connected set of MOSFETs to boost voltage rating and paralleling 16 of them for a total of 32 MOSFETs (I will eventually use the 3.3 kV Genesic SiC MOSFETs (G2R50MT33k).
The MOSFET bank has to withstand and inductive voltage spike in a pulse inductive energy storage pulse generator. Really, I'm trying to split a trigger signal into 32 trigger signals that can still drive the gate driver boards. For some reason, this part is not explained well anywhere. I've read some about using various kinds of drivers or buffers to amplify the trigger signal back up in voltage, since the voltage will drop in splitting the trigger signal with traces or cables. Basically, I want to understand how this works and why we do it one way as opposed to another.
No one yet seems to address what I'm asking: how to get 32 trigger signals to the Si826 optocouplers. I've got plenty on the other stuff, just need to know how to build an amplifier system for a 5 V input trigger with pulsewidths from 50 ns to 2 us.
since the voltage will drop in splitting the trigger signal with traces or cables.
It will? To any consequence? The drivers seem to have opto-coupler inputs, 4 mA are enough, apparently. I'd be concerned about timing more than drive strength here, and about delay differences between the individual driver modules as well as a systematic timing difference between "upper" and "lower" MOSFET.) \$\endgroup\$