I started out experimenting with a very basic current limiter that begins to pinch off a pmos when about 0.7 V drops across a shunt
I then decided I wanted to be able to trim the current with a pot and have a bit more predictability, so moved to a design with a dedicated current sense amplifier. The following circuit basically functions on the breadboard, but the current limit is not a hard threshold. It varies with R1 and R3. The current sense amplifier is a MAx4080S with a gain of 60. I'm doing a bit of a hack where I use a ground reference off a zener, so when theres no current across the shunt, the output is zero (i.e. about -10 V) and as current flows through the shunt, the voltage drops and is amplified and pinches off the pmos. I'd like it to work more predictably if the source voltage sags or the load impedance changes. How could I go about improving this design?
Additional info: This circuit operates off a PWM drive signal (sometimes 10% driven in the range of a few kHz) from another circuit that is low-side switched. The regulation needs to kick in fast. The 48 V might sag down to 40 and the load impedance is unstable. I need to drive everything off the 48 V(ish) supply I have (hence choice of 4080)
A scope across the load shows current oscillating at 83 kHz! Why (there is a 100 Ω resistor between the output of the amp and the gate)? Schematic 3 below removes the oscillations but the integrator wind up is huge (~500 µs)