I have an IC with tight pad spacing. As such I want to override the global clearance settings for this footprint to be able to route it.

If I go to the footprint properties clearance overrides>clearances>pad clearance and set a value it does not seem to apply in the layout view.

I tried the same in the library footprint editor, board footprint editor and single pad properties. In all the editors the preview clearance ring gets the correct size, but regardless it does not change in the layout view of my board.

If I set a bigger value instead of a smaller one, it changes correctly in all views.

What am I missing? Where does the pad clearance on a freshly inserted footprint come from? I thought it would get the default net class setting. Yes, now when I experiment I see that if I insert a normal passive it gets the default net class setting and in updates if I change the settings. Both footprints I downloaded and inserted into this project have their own fixed size, however. Where does that likely come from? Again, in the editors it looks correct…

This screenshot is from selecting the component in layout and pressing edit footprint. As soon as the editor opens you can see that the clearance settings differ between the editor and the layout view.

enter image description here

I'm on version 8.0.3

  • \$\begingroup\$ Did you refresh the footprint in the pcb editor by right-clicking and select "refresh footprint"? \$\endgroup\$ Commented Jun 19 at 6:47
  • \$\begingroup\$ Yes. I also used the update from library function after editing the lib footprint. \$\endgroup\$ Commented Jun 19 at 7:01
  • \$\begingroup\$ What clearance have you set in the design rules? It may be overwriting the clearance in the footprint... \$\endgroup\$ Commented Jun 19 at 7:35
  • \$\begingroup\$ Thank you, that's it! I was looking at the net class settings, but missed the constraints. If you read the popup it clearly says that the setting will not be overwritten by overrides. If you submit it as an answer I'll accept it. \$\endgroup\$ Commented Jun 19 at 8:25

1 Answer 1


The clearance in the design rules constraints will always overwrite your footprint settings, if your clearance in the footprint is smaller then in the design rules.

Since more clearance has no negative impact, your footprint clearance can be greater then your design rules. This is useful when designing parts with more voltage and therefore more clearance.

  • \$\begingroup\$ I'd disagree on the statement that "more clearance has no negative impact". It can definitely cause difficulties with routing, and it means you'll have larger cutouts in planes. \$\endgroup\$
    – Hearth
    Commented Jun 19 at 14:57

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