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If there is a binary number stored in a flip flop register, how can I convert this into a single positional bit in another flip flop register? For instance, if the number is 11b or decimal 3, I want to covert this to 100b. Interested in the logic gates or constructs required to do this.

One thought I had is to use a subtract logic unit, subtracting 1 from the base positional register until 0, as this occurs shift a 1 into the new register one position at a time.

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I think you are asking how to design a decoder.
There are many online references on how to do this.

For example:
decoder
trurthtable

(source: https://www.allaboutcircuits.com/textbook/digital/chpt-9/decoder/ )

Traditionally, a 2x4 decoder will output b'1000 for an input of b'11. In your example you were asking for a 2x3 (which is odd, but it's your application), so just ignore the output D0. Now your input b'11 will output b'100.

<edit per question in comment>
I believe you are making it more complicated than necessary. If your goal is to create a decoder for use in a MUX, you almost certainly want the conventional decoder truth table provided above. But, if for some reason you really do want the truth table that you suggested, you can make some simplifications:

Here is how I interpret what you asked for...

in --> out
-----------
00 --> 000
01 --> 001
10 --> 010
11 --> 100

a1 a0 --> d2 d1 d0

If we forget the last line (i.e. 11 --> 100) for a moment, you'll notice that you just have

d1 and d0

But that is only true when a1 and a0 are not both 1. In other words
d0 = a0 and not(a0 and a1)
d1 = a1 and not(a0 and a1)

As it happens, d2 is only a 1 when both a0 and a1 are 1.
d2 = a0 and a1

So, you can just borrow that (a0 and a1) to complete the d1 and d0 outputs.

full circuit

But again, I highly doubt that's what you actually want. I suspect you want the truth model for the traditional decoder, as provided earlier.

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  • \$\begingroup\$ This makes sense. Would it work using a flip flop and full subtract register as I brought up? \$\endgroup\$
    – notaorb
    Commented Jul 24 at 4:43
  • \$\begingroup\$ @notaorb Yes, you can design that way. However, it needs a clock and an additional state machine to execute the decoding. This needs more resources than a pure combinational decoder. \$\endgroup\$ Commented Jul 24 at 5:36

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