# Delay-on transistors circuit with sharp front

I am new to circuit engineering and have a quite specific task - create a delay-on key with a sharp front, low power supply and high current.

I created a simple key on a single 2N2222 transistor how as described in the topic switch on delay not working (capacitor, transistor).

It works in general, and allows to change delay time, but does not match the requirements for a current's front. The current increased during capacitor charging. I googled and built another circuit - using three transistors.

simulate this circuit – Schematic created using CircuitLab

But, unfortunately, it also does not as expected. Could I use another type/model of transistor and another value resistor?

Below are forms of output currents.

• power supply - 3.7 V
• output current - 400...500 mA
• sharp front of output current
• delay time - 4...8 s
• adjustable delay (by changing capacitor's value)
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• Replace Q1 with a comparator? Commented Aug 1 at 14:26
• Actually I don't know, but circuit should be on discrete and simple elements. Is it possible? Commented Aug 1 at 14:34
• A comparator isn’t discrete, but if you redesigned this around an RC + comparator + output transistor, it would be same or slightly smaller. An MCU would be even easier and more precise. Commented Aug 1 at 14:50

As far as I can tell, the causes of the slow transition are:

• R2 is very large, and isn't even necessary

• The last stage is an emitter-follower

I'll address those later, because there are more serious problems to deal with first. With your arrangement of Q1 and Q2, you have almost a direct short circuit across the supply, via Q2's base-emitter junction, when Q1 is on. That needs to be remedied with a base resistor:

simulate this circuit – Schematic created using CircuitLab

The last stage (Q3) isn't a voltage amplifier, it's an emitter-follower (also known as "common-collector"), with a voltage gain of 1, and so it doesn't really help to increase rate of rise or fall. Worse, an emitter-follower's output (at the emitter) is always 0.7V or so lower than the base, so the load will never see more than 3V. If you insist on having the load on the "low side" (grounded), then you need to replace Q3 with a PNP device.

You've chosen a low base resistance R4, sufficiently low to fully switch on Q3 with a heavy load. That's good, but if Q3 is a common-emitter PNP, then ideally you'd want the prior stage Q2 to sink base current via that resistance only when Q2 is on, to avoid unnecessarily large R4 current flowing when the load is supposed to be off. These two scenarios are shown here:

simulate this circuit

On the right, R7 (whose only role is to keep Q3 switched off in spite of Q2 leakage current) is passing only microamps of current when the load is off, and base current through R4 is only significant when the load is on. On the left, Q2 must be on to switch off Q3, meaning that you have a lot of current in R4 while the load is unpowered.

Since the final two stages (Q2 and Q3) now provide significant gain, the first stage is not so critical, and you can employ either a PNP or NPN transistor. However, in keeping with the ideal scenario of using a transistor to sink/source base current for the next stage, rather than a pull-up/pull-down resistor, I'll use a PNP for Q1.

I'll also remove R2, since it's not needed, and it is limiting Q1 base current, leading to a much slower turn-on. Here's the modified design so far:

simulate this circuit

It produces a very sharp transition, but by removing R2 the delay is not as long as before:

We can lengthen the delay by modifying Q1's switching threshold. There are a number of ways of doing this, but I'll employ a couple of diodes to offset the voltage applied to Q1's base:

simulate this circuit

Previously, capacitor C1 had to charge to only 0.7V to switch on Q1, but with the diodes in place (and R2 to bias them to develop a total of about 1.2V), C1 has to charge to something like 2V now. For the same R1 and C1, this would nearly triple the delay, but there's another change I've made.

I've increased timing resistor R1 a lot. I am able to do this because the extremely high current gain of those three cascaded common-emitter stages will draw almost no current from Q1's base. In other words, I can use much higher resistor values at the base of Q1. The resulting delay is closer to 20s now:

Such a long delay is not recommended, because it will take the supply a full second or more to rise across the load. To obtain a faster rise time, you should employ positive feedback to implement a schmitt trigger. There's probably an easy way to modify the above design for that, but periblepsis' answer addresses this nicely. Frankly, you'd be better of using a comparator (with gain in the millions):

simulate this circuit

R8 is necessary to keep the comparator's input within its acceptable range. I've included D1 to discharge the capacitor quickly when the power supply falls, so that the system is "reset", and ready to produce another identical delay the next time power is applied. You should probably do the same for any design.

R2 and R3 produce a threshold potential that the comparator compares with capacitor voltage. R7 provides a little positive feedback, for hysteresis, so that switching occurs cleanly even if the input voltage source rises slowly, or is noisy.

Here's the result:

Adding positive feedback 22k resistor should speedup the edges. For 4sec use about 1mF/10V capacitor. The 2k2 discharges the capacitor after switch is off.

Note: Decreasing 22k feeback resistor to 10k or even 4k7 should sharpen the rising edge even more, but it will corrupts the leading edge making it dependent on turning off the power supply with SW switch only.

• Thanks a lot! Looks very promising) I'll try your solution. One additional question: which transistors I should use? 2N2222 and 2N2907 are good for this? Commented Aug 1 at 15:11
• 2n3904 for Npn. For Pnp use some more switching type with low Vce_sat, otherwise there will be a huge drop on CE. Or use P-ch mosfet like NDP6020P. Commented Aug 1 at 15:28
• BD136 is usable, but todays exist transistors with much better Vce_sat performance like NSS20200LT1G or NSV20200LT1G Commented Aug 1 at 15:56
• Thanks a lot for your support. In fact all are depends on availability of mentioned transistors) I found replacement for 2N3904 --> 2N4401 Is it correct? And BD136 seems in stock. Commented Aug 1 at 16:15
• Seems ok. The Npn should have Beta 150 and Pnp 80 at least. You can use 2n2222 as Npn also if it’s available. Commented Aug 1 at 16:24

Usually, for sharp edges, you'd remember the term Schmitt Trigger.

Your need for lots of output current compliance is a bit of a strain, though. This strongly suggests a MOSFET as the output driver for your load since a MOSFET gate doesn't require a lot of current once it has been switched on. Using a MOSFET as the output switch then allows the Schmitt trigger before it to use less operating current. In contrast, a single bipolar as the switch will require lots of continuous base current, forcing the Schmitt trigger circuit before it to run hotter. Another option would be to use a Darlington, but this drops too much voltage.

In short, with your compliance current requirement and the need to keep the circuit simpler rather than more complex, you should consider using a MOSFET as your load switch. In the following, I'll select a high-side PFET and use NPN bipolars for the Schmitt trigger. But the circuit can just as well be inverted, with polarities reversed and the circuit turned up-side-down, so to speak, to use PNP bipolars and an NFET if that's better for you. It may be worth inverting like that as it expands options for the MOSFET switch.

Regarding the Schmitt trigger, a good design would allow your RC delay (following an RC decay curve) to use a modest capacitor value and therefore a higher-valued resistor. (Cheaper/smaller.) But any circuit attached to it will draw some current. So it would be nice to have a low-powered Schmitt trigger that doesn't need a lot of current when sampling the RC source. And then that should be combined with the MOSFET output stage that doesn't require a lot of current to operate your load.

The following schematic shows uses of commonly available resistors and the same value for as many as I could manage. This means that the design is less than optimal because it severely limits your choice of PFET to devices with $$\\vert V_{_\text{TO}}\vert \le 1.3\:\text{V}\$$. So, while I've selected one that will work with these resistor values, I strongly suggest you read the two notes on the schematic, regarding $$\R_1\$$ and $$\R_3\$$, and apply the suggestions instead, as this will greatly increase your options in selecting workable PFETs and permit devices with $$\\vert V_{_\text{TO}}\vert \le 2.3\:\text{V}\$$ -- which greatly increases the options available.

simulate this circuit – Schematic created using CircuitLab

I used a $$\470\:\text{pF}\$$ capacitor so that it is just barely large enough to overcome and manage trace capacitances found on solderless breadboards.

You can, of course, make adjustments to the timer part values.

I'll show a run with the resistor values as shown above and with the PFET also as shown. But if you follow the suggestions and change $$\R_1\$$ and $$\R_3\$$ as suggested, many more PFET options will be available to you.

The device I show doesn't come in a TO-92 package, so far as I know. Without specs from you, I am just picking something I know will work. And if you require a TO-92 package, I don't think you will find one capable of your current compliance, need for a low voltage drop across the switch, and also still meeting the threshold voltage needs, too. So I'll leave such searches up to you.

Rise time is on the order of $$\10\:\mu\text{s}\$$ in this case.