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I'm making a 2 layer pcb and I was wondering if I should have ground plane on both sides of the board or only on the bottom side. Is there any downsides of having gnd on both sides? And is it ok to have a ground pour even below the buck converter part - especially below the inductor? Here is my pcb layout:

  1. GND only on the bottom side

enter image description here

  1. GND on both sides enter image description here enter image description here
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  • \$\begingroup\$ I'd be more worried about running the data lines to ethernet IC so tight together because of crosstalk and so on (especially with no series resistors). Also the RS485 lines should have a ground connection. \$\endgroup\$
    – Wesley Lee
    Commented Aug 8 at 10:09
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    \$\begingroup\$ Both your ground planes are heavily compromised due to all the long traces. I would try to do via stitching between them to make the sum of both as complete as possible. Connect every island with at least one via. Or move to four layers. \$\endgroup\$
    – winny
    Commented Aug 8 at 10:27
  • \$\begingroup\$ @WesleyLee I will try to make a bigger space between them. Is the gnd connection needed if i will be using the same power supply for all the connected slaves? \$\endgroup\$
    – k0cka
    Commented Aug 8 at 10:49
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    \$\begingroup\$ Apparently, your design doesn't meet the impedance requirements. For a 1.6mm-thick PCB, the trace width should be nearly 1 mm (neglecting the trace-to-trace spacing for now but should be 0.2~0.3 mm depending on your PCB mfg's manufacturing capabilities) to get 100-Ohm differential impedance which is crucial for ethernet. So maybe you should focus on this first. \$\endgroup\$ Commented Aug 8 at 11:26
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    \$\begingroup\$ it might be possible for a really experienced designer to make a 2 layer board work with ethernet, but yoi are not that. Make it possible fir yourself, use 4 layers (practically the same price board), make one of them an unbroken ground, and reference your controlled impedance traces to that. \$\endgroup\$
    – Neil_UK
    Commented Aug 8 at 12:54

2 Answers 2

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Two-layer is fine. Actually, that's not bad.

The main things to beware of are:

  • Ethernet: treat the media side as hazardous voltage. It seems innocent enough, just an isolated cable, right? But it's rated up to 1.5kV isolation, so you need to be sure that isn't jumping to your circuit. Remove ground here, under the transformer until the connector. (It's fine to have ground up alongside, to meet the LED traces, and connector shell.) This area should be poured underneath with the common node (Bob Smith termination) instead, with adequate separation distance (a few mm) to circuit GND, and then the ESD capacitor (1nF 2kV) goes from this node to circuit GND (or preferably, to chassis if present).

    You'll want to read up on Ethernet layout appnotes and what "Bob Smith termination" is, to get a better idea what to do here.

  • As much as possible, all components and signals should have contiguous ground above or below them. Intersections are inevitable, and routing a trace under another, necessarily creates a negative space where there is zero ground present on any layers. Stitch around such openings, to minimize the open loop area, and perimeter, of this negative space.

    Automatic via stitching placement is a start, but I've highlighted some priority locations below (green circles). Notice they target either side of relatively long traces, and islands/peninsulas where ground is otherwise poorly connected.

enter image description here

I've also roughly sketched how better to handle the Ethernet situation: it's probably easier to route the second pair up and around the pins; this will swap the pair polarity, but this is okay, swap it on the PHY side of the transformer as well. And now that's also easier to connect. Matter of fact, I think both are better this way.

Don't worry about length matching: they could be off by some cm and it won't really matter. Since you don't have matched impedance, your priority is on keeping trace length short. This arrangement allows you to butt the transformer and connector together (isolation distance permitting), and likewise transformer and PHY.

Impedance matching is impractical on 2-layer boards, maybe unless it's ordered very thin (<1mm): required trace width for 50Ω is about half the board thickness, or 0.8mm, a ponderous size for signal routing. Just keep them short, so your too-thin traces look like small inductors -- small enough not to affect signal quality. (Traces can still be fattened a bit, where it's practical to do so.)

You may also want to bus more strongly, the signals from left side of ESP32 to CN1, and route them below the right side of ESP32. This avoids the column of vias shown above, so that just a quartet will stitch the bus crossing, and a few here and there can fill out the flat (GND over GND) areas, or their perimeters/corners. This allows GND to pour under the ESP32 right-side pins.

Alternately, you could push all these traces to the top layer, and use short jumper lengths (which can be seen elsewhere on the board) so that bottom GND pours around most of them. Those two right-side traces (in the gap between ESP32 and CN1) might be bottom-side then, with ground stitching.

What's D4 doing? Is that in case CN1 backpowers the unit, and POWER_IN is unavailable? Hmm. Depending on type, U6 might be okay with that, but maybe better not to risk it. A wired-OR switch might be used, or maybe you can just improve things as-is: take feedback after D4 (I think that one via between C4/C7 is going back to U6-1?), and probably move C6/C7 after D4 so the regulator compensation isn't quite as weird as it would be otherwise. Then the regulator compensates for D4's drop.

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  • \$\begingroup\$ Thank you very much for your effort and detailed answer, I really aprreciate it! I will try to implement your points and come back with an updated layout. Btw while I was searching for some ethernet layouts, I run into this project which uses HR911105A with built-in magnetics. I think this would make things easier for me, what do you think? github.com/c-/ESP32-Ethgate \$\endgroup\$
    – k0cka
    Commented Aug 9 at 13:28
  • \$\begingroup\$ Yes, integrated magnetics jacks are convenient, saves board/layout area too. \$\endgroup\$ Commented Aug 9 at 15:44
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  1. There are no problems in having a ground plane on both sides of a two-layer PCB. If you are using many layers, there are some conventional PCB stack-ups that you could have a look at. (Knowing PCB stack up is helpful when designing multiple types of circuits. Have a look around Google)

  2. Regarding the ground pouring under the inductor, I am quoting the following "It’s fair to conclude that placing ground below the switching node and inductor in a switching regulator PCB layout is not problematic if you’re willing to sacrifice a bit of inductance due to the presence of eddy currents in the adjacent copper. " Refer to the following link for a detailed explanation.

https://resources.altium.com/p/should-ground-be-placed-below-inductors-switching-regulators

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