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I was looking to build a small electric spark generator and stumbled across this circuit or slight variations of it more or less everywhere I looked:

enter image description here

I am not entirely sure of the way it works since my explanation for it implies a very risky circuit behavior, and transformers and spark gaps aren't the easiest to model. Correct me if I'm wrong.

The way I picture it is that while the MOS is in the ON state, the primary inductor is getting charged with a RL time constant such as:

$$I_L(t) = \frac{V1}{R_{series}}\left(1-e^{-\frac{t}{\tau}}\right)$$

Once the current is established such that \$I_L = \frac{V1}{R_{series}}\$, the MOS is switched off leading the voltage across the primary inductor to behave this way:

$$V_L(t) = L \frac{d I_L(t)}{dt}$$

Since the MOS stops conducting very quickly and there's no flyback diode to get the current to flow somewhere else \$\frac{d I_L(t)}{dt}\$ grows very large, leading to a large voltage across the primary inductor.

Since this voltage is very rapidly time-varrying (a spike), it gets to the secondary according to Faraday's law \$\left(e= -N \frac{d\phi(t)}{dt})\right)\$ such that:

$$V_{L2} = V_{L1} \frac{N2}{N1}$$

The MOS does not break down since the spark gap is shorting the secondary at a given voltage resulting in:

$$V_{L1,max} = V_{L2,spark} \frac{N1}{N2}$$

If this is indeed the way this circuit works, isn't it super dangerous for the MOS?

If the two electrodes of the spark gap are too far apart or if the transformation ratio of the transformer isn't high enough, nothing's here to limitate the voltage across the primary leading it to exceed the MOS's breakdown voltage.

My guess is that a TVS diode in parallel with the MOS would mitigate this risk:

enter image description here

A TVS diode having a breakdown voltage lower than the MOS' would sink the current to the ground and lower the primary voltage spike to a safe level for the MOS, but it still stresses the diode a lot for no good reason.

Wouldn't a better circuit be this?

enter image description here

Adding a capacitor in parallel with the primary creates a resonant RLC circuit with a maximum amplitude that can be chosen with the right R, L and C and which can easily be found by solving the corresponding second order differential equation. This amplitude can be chosen so that it never exceeds the MOS breakdown voltage. Beside the main peak, most of the oscillation is shorted by the body diode of the MOS and the TVS diode, in case a spark actually takes place on the secondary an even greater attenuation of the following oscillation takes place since some energy is being released in the spark.

Connecting the primary to the secondary like shown also allows to increase the effective voltage on the secondary.

My only fear is that when the MOS is switching back ON, the capacitor will see a variation in voltage leading to a large in rush current \$I_c(t) = C \frac{V_c(t)}{dt}\$ but that's nothing a small resistance can't fix.

  • Is my reasoning right on this circuit?
  • If yes, why isn't a capacitor always present to limit the primary voltage and protect the MOS? On the dozens of instances of this circuit I found online, only one of them actually had a tank circuit.
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  • \$\begingroup\$ iL=Vin/Rseries … you don’t want to charge inductor to that point. The inductor is saturated at this condition already . You should turn off before. \$\endgroup\$ Commented Aug 23 at 10:01
  • \$\begingroup\$ @MichalPodmanický Depends -- automotive ignition is normally designed this way, perhaps using coil resistance, perhaps using an external resistor. (I believe the usual way is an external resistor, which gets bypassed during cranking to ensure operation even under extreme low-battery conditions.) Whether any random inductor gets saturated, depends on its construction, and the applied voltage. \$\endgroup\$ Commented Aug 23 at 10:03

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You're on the right track. There are a couple contributions you've missed:

  1. The MOSFET itself has output capacitance.

Turn-off dV/dt and dI/dt are never truly unlimited, of course; and even if the switching node weren't loaded with capacitance, and the MOSFET driven with an ideal step gate voltage, no real transistor switches off instantaneously, limiting dI/dt there. (In practice, internal capacitances, drive resistance, and common-source inductance limit both rates.)

Especially with modern transistors, this capacitance may not be all that much, not significant enough to limit peak voltage within ratings -- so you have the right suspicion that more (external capacitance) might be necessary.

  1. The transformer has capacitance, too!

This is easy to see when considering its construction: made of a spool of wire, each turn of wire overlaps the last, and so on, thus there is some capacitance between turns -- nope, it doesn't matter that it's all "the same wire", rather it matters that different parts of that wire are doing different things -- adding a volt or few with every pass around, and so there's voltage between turns, an insulator of some thickness (wire enamel + potting), and some area (width from the wire diameter, more or less, times the length distributed along the winding).

More or less; the layering or sectioning of the winding varies with design, but suffice it to say, sooner or later, there's a heck of a lot of turns on there, so the capacitance really adds up.

Most of all, the secondary's distributed capacitance is effectively multiplied by the turns ratio squared, so that, as seen from the primary side, the capacitance is really high indeed. It's no accident that, back in the days of "points" ignition, a fairly generous capacitor ("condenser") was used to mitigate sparking -- 0.2µF or so, and this didn't reduce peak voltage enough to cause problems.

There is still a dominant inductance as seen at the MOSFET, because of leakage inductance: the primary and secondary are not perfectly coupled, but there is some distance between them, and in that gap, leakage flux flows. This manifests as a series inductor into an ideal transformer, so even if the secondary were a short circuit (as it might be in a given instant, due to its capacitance; or during conduction, due to the spark's low voltage drop), the MOSFET still sees some inductance at the primary side, and some voltage clamping is desirable.

In any case, the effect is to store or dissipate some energy due to the inductance seen by the MOSFET: whether flyback from a free-wheeling (no spark) transformer, or just the leakage inductance. We can store that inductive energy in a capacitance (which then rings down over time, dissipating energy in circuit losses, or returning some to the supply), or dissipate it in a clamp, like a TVS.

MOSFET Ratings

You are right to suspect protection is desirable.

Back in the day, MOSFETs were not especially high-density (i.e. large die area for given switching capacity, particularly in high voltage ratings), and one of the side-effects of that was, high power dissipation capacity (big die area, easy heatsinking!) and avalanche withstanding (big die = big heat capacity, even for short, high-current pulses). Consequently, repetitive avalanche ratings were widely available.

These types are still available in certain legacy product lines, IRFP460 for example. Despite them having nearly an order of magnitude poorer performance compared to modern parts, many remain too useful to die, whether for general-purpose use where performance doesn't matter, or in niches where the "poor" performance is a virtue, like this, robust switching, or for linear amplifier application, power supply limiting, etc.. Examples include IR's HEXFET family (IRF(P)xxx(x), IRFZxxN, etc.), and competitor's / 2nd-sources' equivalent "planar stripe" (and some "mesh") processes. Some have also parlayed their now-otherwise-obsolete lines into boutique "linear" families (Littelfuse (previously IXYS) Linear L2 for example) -- and priced accordingly. :)

But in contrast, most modern devices have a fraction of the die area, and due to differences in construction, and the general push for miniaturization, robustness has declined. In particular, repetitive avalanche ratings are almost extinct (at least, I can't recall having seen a new-design MOSFET with the rating -- which isn't to say they don't exist at all, just that I haven't noticed one that did, or haven't come across one that does). Peak avalanche current (beyond which, forward-bias of the parasitic BJT occurs, typically followed by rapid destruction) tends to be lower, and only single-pulse avalanche ratings are given. (The energy figures are still usually quite generous, for what they are.) But that's the thing, it's single ever: maybe it survives one shot, maybe two, maybe it survives a hundred, but almost certainly not a million.

So, suffice it to say, an external protective device is helpful. A TVS does not have the complex construction of a MOSFET, and handles avalanche essentially forever. We can also integrate them into the device, so that current is made to flow through the channel instead (which avoids the cumulative breakdown mechanism of avalanche).

Consider these ignition coil driver IGBTs for example: LGD8201ATI They use an IGBT structure to get better device density (in particular, lower voltage drop at fairly high currents, in a small package, with surprisingly little gate voltage too), and offer quite acceptable UIS (Unclamped Inductive Switching) avalanche ratings -- a few hundred mJ in a package that size, is quite good. These also have internal gate resistance so they don't switch very fast: maybe not the best idea if you want to generate high voltages quickly, but when an ignition coil takes some 10s of µs to spike up anyway, this is still fine, and you save a lot of potential EMI (electromagnetic interference) issues, where the transformer's step-up ratio would otherwise make the plug cables act as antennas.

We can also consider snubber circuits, like the basic RC dampener, or a nonlinear type like an RCD rate (dV/dt) snubber, or peak clamp snubber:

schematic

simulate this circuit – Schematic created using CircuitLab

enter image description here

With the RCD snubbers, R1-C1 don't really do anything, but you can see their effect when deleting the others.

Note that, if D1 isn't conducting, R2-C2 serves the same role, so you'd never use both in combination, but dimension the RCD rate snubber so that the RC value provides this value, as well as the D-C rate snubbing that is desired.

The dV/dt snubbing isn't very visible here; we need to zoom in to see it better:

enter image description here

The rising edge has been stretched out over a few hundred ns, instead of the ~instantaneous (at this simulation timestep) rise it would otherwise have.

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  • \$\begingroup\$ You know, I was going to comment here with an example of a modern MOSFET with a repetitive avalanche rating (because i thought i remembered seeing them on SiC MOSFETs, which are all modern as the technology only recently became commercially viable), but now that I try to find an example, they are indeed all single-pulse ratings. There are some GaN devices with a repetitive rating for pulsed "switching surge voltage", which is sort of the same concept, but also not really. \$\endgroup\$
    – Hearth
    Commented Aug 23 at 16:20
  • \$\begingroup\$ Hah, indeed. GaN are particularly fragile; besides the small die, I'm not aware that stable avalanche is really possible in the material... maybe at all? Not that they exactly have any need to, but all InGaN LEDs I've tried, fail suddenly (even at very low reverse currents), in contrast to all GaP to GaAlAs LEDs. Haven't seen any GaN transistors rated for avalanche as such. \$\endgroup\$ Commented Aug 23 at 18:06
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    \$\begingroup\$ That's, as I understand it, one of the main advantages of SiC over GaN: it's more rugged, and can survive avalanche or gate voltage spikes without damage. Though it's not exactly hard to be more rugged than GaN; it fails if you look at it wrong. \$\endgroup\$
    – Hearth
    Commented Aug 23 at 18:22
  • \$\begingroup\$ That's a way more detailed answer than I could ever hope for! Thanks a lot! \$\endgroup\$
    – tampler
    Commented Aug 24 at 16:35

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