Using this link as reference: https://www.allaboutcircuits.com/textbook/semiconductors/chpt-4/common-collector-amplifier/
In this section of the book, the author was describing that the voltage of Rload follows Vin-Vbe(0.7V). This makes sense to me.
However what confuses is how does VCC not affect the voltage of Rload in any way? If we assume the transistor is in saturation mode (Lets say Vce=0V), isn't Rload pulled up to VCC?
Some preamble first, to set the scene. For this emitter follower, \$V_{OUT} = V_{IN} - 0.7V\$:
simulate this circuit – Schematic created using CircuitLab
We'll assume that V1 (the source of input \$V_{IN}\$) never exceeds V2 (the source of supply voltage \$V_{CC}\$, because if it did, then the base-collector junction of transistor Q1 becomes forward biased, and the operation of this circuit moves into a completely different regime, in which nothing I'm about to say is valid any more.
We'll also assume that V1 never falls below +0.7V, because if that happens the base-emitter junction is no longer forward biased, and Q1 is in cut-off.
Another assumption I'll make is that Q1's current gain \$\beta\$ is very high (say, 100 or so) meaning that collector current \$I_C\$ and emitter current \$I_E\$ are roughly equal. Base current \$I_B\$ is so small that its exact value is unimportant for this argument.
So the conditions are:
$$ +0.7V < V_{IN} < V_{CC} $$ $$ I_E \approx I_C $$
Under these assumptions, the base-emitter junction is always forward biased, passing a tiny base current \$I_B\$ so \$V_{BE}\approx 0.7V\$. We can apply KVL to obtain an expression for output \$V_{OUT}\$ in terms of \$V_{IN}\$:
$$ V_{OUT} = V_{IN} - 0.7V $$
This already suggests that \$V_{OUT}\$ is independent of \$V_{CC}\$, and this is backed up when we write \$V_{OUT}\$ in terms of emitter current \$I_E\$ through \$R_1\$, using Ohm's law:
$$ \begin{aligned} V_{OUT} &= 0V + V_{R1} \\ \\ &= 0V + I_ER_1 \\ \\ &= I_ER_1 \end{aligned} $$
Still no mention of \$V_{CC}\$.
Since \$V_{BE} \approx 0.7V\$, one might expect the transistor to be saturated, forcing \$V_{OUT}\approx V_{CC}\$. However that's not the case, so let's see why.
Imagine that for some reason \$V_{OUT}\$ decreases. In other words, the voltage \$V_{R1}\$ across R1 decreases. If \$V_{IN}\$ stays fixed at +5.0V, this would increase \$V_{BE}\$. Remembering that the base-emitter junction is just a diode, this would in turn increase current \$I_B\$ through it. Collector current \$I_C\$ would also increase, because \$I_C=\beta I_B\$, and so will \$I_E\$.
But if \$I_E\$ increases, the voltage across R1 must also increase, in opposition to the change that caused \$V_{R1}\$ to fall in the first place.
A similar thing happens if \$V_{OUT}\$ were to rise somehow. By the same reasoning, this would result in a decrease of \$V_{BE}\$, accompanied by a corresponding decrease in \$I_B\$ and \$I_E\$, finally causing \$V_{R1}\$ (and of course \$V_{OUT}\$) to fall, in opposition to the change that caused \$V_{R1}\$ to rise in the first place.
A pattern is emerging, that this arrangement strongly opposes any attempt to change \$V_{OUT}\$. Whatever we do to change \$V_{OUT}\$ results in a response by the transistor to oppose that change, a kind of "negative feedback" inherent in any emitter-follower configuration. This is its chief purpose.
One other thing also emerges from all this, that the transistor is never fully switched on or off. \$V_{BE}\$ may be close to 0.7V, but it's never quite large enough to fully switch on the transistor (saturation), but also never small enough to switch it complete off (cut-off). The system is always in a state of equilibrium in which \$V_{BE}\$ is exactly the right value to produce \$V_{OUT}=V_{IN}-0.7V\$. If \$V_{BE}\$ is perturbed one way or the other, the consequent change in collector and emitter currents immediately undo that perturbation. Inherent negative feedback.
This all relies on the absence of a sharp switching threshold at \$V_{BE}=0.7V\$. If the transistor were to switch between cut-off and saturation with no in-between state, then this behaviour wouldn't be possible. The transistor is required to go between cut-off and saturation over a range of \$V_{BE}\$, say 0.65V to 0.75V for this to work. A simple experiment shows this in action:
In this circuit I am not applying applying a base potential with respect to ground (0V), I am applying a potential difference directly between base and emitter, explicitly controlling \$V_{BE}\$. This permits me to see how collector current varies as a function of \$V_{BE}\$ directly:
As you can see, there is a range of values of \$V_{BE}\$, 0.6V to 0.75V, over which collector current goes from minimum 0A to maximum \$\frac{12V}{R_1}=12mA\$, and the emitter follower always finds an equilibrium somewhere on the curve in between those extreme cut-off and saturation states.
In other words, it is always operating in its active region. Consequently \$V_{OUT}\$ can be (and always is) less than \$V_{CC}\$.
There are a few definitions of saturation, but at least you need to have Vb > Vc, so you'd have to give the base a higher voltage than Vcc. So Vcc does not affect the emitter voltage unless it's lower than the base voltage. To greatly affect it, it would have to be Vbe-Vce(sat) lower than the base voltage, which could be something like 0.6V lower.
The transistor is typically not saturated in an emitter follower, so Vce is relatively large compared to a saturated switch situation.
simulate this circuit – Schematic created using CircuitLab
That means the transistor dissipates more power than if it was saturated for a given load current, however since it is not saturated it will switch faster (and it provides current gain).
When making fast logic chips with BJTs, the transistors were often prevented from saturation via something like a Schottky clamp or they use non-saturating circuits such as ECL (Emitter-Coupled Logic).
In fact, what the transistor in an emitter follower (attempts to) maintain through negative feedback is the base-emitter voltage (approximately 0.7 V) rather than the emitter voltage. However, since Vbe = Vin - Ve, the illusion is created that, for a given input voltage, the transistor is regulating the emitter voltage.
simulate this circuit – Schematic created using CircuitLab
From this perspective, all other quantities appear as disturbances that the transistor tries to compensate for in order to keep the base-emitter voltage constant. (Changes in) some of them are undesirable, for example:
Supply voltage from 0 to 20 V.
We see that the circuit starts working somewhere at 5 V supply voltage, and then the output voltage is little affected by the supply voltage.
Load resistance from 100 Ω to 10 kΩ.
The output voltage is little affected by the load.
Transistor beta from 10 to 300.
We see that the circuit works well for beta > 100.
Collector resistance (if any) from 0 to 10 kΩ. We can provoke the transistor by inserting a resistance in the collector circuit.
The transistor reacts to this intervention by reducing its "resistance" and manages to restore the output voltage.
Input voltage from 0 to 10 V. However, one of the disturbances is desirable, and we want the transistor not to compensate for it; this is the input voltage.
The output voltage copies the input offset by about 650 mV.
Analogously, what an op-amp in a voltage follower configuration (attempts to) maintain through negative feedback is the differential voltage Vd between its two inputs (approximately 0 V), not its output voltage. However, since this is the difference between the input and output voltages, it creates the illusion that for a given input voltage, the op-amp controls the output voltage.
From this perspective, all other quantities appear as disturbances that the op-amp tries to compensate for in order to keep Vd close to 0 V. Changes in some of these are undesirable, for example:
Supply voltage from 0 to 20 V.
Load resistance from 100 Ω to 10 kΩ.
Open-loop gain (AOL) of the op-amp from 1 to 1000.
Resistance to the inverting input (if any) from 0 to 1 MΩ.
Floating negative voltage to the inverting input (if any) from 0 to -10 V.
Floating positive voltage to the inverting input (if any) from 0 to 10 V.
Input voltage from 0 to 10 V. As with the emitter follower, one of these disturbances - the input voltage - is desirable, and we want the op-amp not to compensate for it.
