# What is the right way to model power converter noise? Should it be considered as voltage or current?

This reference models the converter noise as voltage and the filter is an LC filter (from right to left).

Another source mentions the converter noise should be considered as current source. Again read from right to left (ignore the arrows if it is misleading).

In both cases the LC filter orientation is such that inductor is connected to low impedance side.

Intuitively I feel both approaches are correct, as HF (High frequency) noise can be modelled as current or voltage. But I think I lack some clarity here. When should i prefer each model?

Current is correct for the most common cases: either the converter is a half-bridge (or two or three as an H or Ж bridge), including the non-synchronous buck case (one switch is passive i.e. diode), and we account for local bypass capacitance as part of the filter; or the input is through a series inductor (boost, flyback) and thus the impedance is naturally high (particularly above Fsw).

The impedance for frequencies near and below Fsw, depends on the control type. A primary-loop current mode control will have a more CCS characteristic for frequencies near Fsw, while a voltage-mode control will transition quickly from the inductor case (above Fsw) to a transformer ratio (i.e. it reflects whatever the secondary load impedance is). At still lower frequencies, the control loop itself takes over, and impedance changes towards negative resistance (the regulation is constant-power with respect to change in Vin).

Note that the transition between inductive (above/near Fsw) and constant-power can be quite quick: such is the case for the peak current mode controller, where average input current has an inverse relation with voltage.

Finally, note that small-signal analysis can only do so much in active, nonlinear circuits such as these; the peak current mode controller for example might transition from negative input resistance, to an inductive characteristic, very suddenly -- as the input test frequency dips in and out of coherence with the controller clock. (This includes at subharmonics, particularly Fsw/2, where instability arises in CCM, with damping ratio equal to voltage ratio.)

Or, consider the hysteretic current mode control, where input impedance is negative until just below Fsw, then suddenly flips to inductive just above; how sudden the flip, depends on test amplitude: a larger amplitude causes stronger injection locking in the controller.

There is the inverse case, for a current-fed inverter, which develops a noise voltage on its switched capacitance, but these are uncommon in practice.

For other cases, we might simply resort to a Thevenin voltage source, including for testing a filter on the bench, independent of any source or load. We might draw this schematically as a voltage source, but imply that it is a Thevenin equivalent. I don't know if this is the context used by your first reference, but as you have access to it, you can take a closer look and see if that is the case.

Whatever the case -- voltage or current, or anything inbetween: the impedance of the source must be defined, as a filter's response is meaningless without a termination resistance somewhere.

Filters are normally plotted in this way in datasheets, i.e. a Thevenin resistive source/load. 50Ω on both ports is common, but asymmetrical loading (e.g. 0.1/100Ω, example: Schaffner FN9226 p.2) may be used as well.