# How to design a non inverting op amp adder for my circuit?

I am trying to implement an adder for my circuit using 4 resistors. From what I read, I understood that so long as you have R1 = R2 and R3 = R4 it really does not matter what value you use. The ultimate result would be V1 + V2.

Now, what my problem is that I have a signal which goes to 1.2 - 1.8 V on the +Ve side and till -800 mV on the -Ve. I want to scale up the signal to the positive level and tried the same thing as given here.

Am I doing something wrong? If yes, is there a better way to do it?

• Could you better define what you expect to see. Just use a single input as an example so, an input range of -0.8V to +1.8V becomes an output range of what? – Andy aka Jun 12 '13 at 7:23

Note that just two resistors actually gets you a good way to your goal:

When R1 = R2, OUT will be the average of V1 and V2, which is just your desired V1+V2 / 2. Therefore, all we have to do is amplify by 2:

The gain from pin 3 to OUT is 2 when R3 = R4.

There are still some tradeoffs to make and issues to be aware of, however. We know that R1 should be the same as R2, but what absolute value should those be? This depends in part on what V1 and V2 can drive. To minimize load on V1 and V2 you want to make R1 and R2 as high as possible, but if you make them too high the node on pin 3 will too easily pick up stray noise, the leakage current of the opamp will create a relevant offset voltage, and the inevitable stray capacitance on that node will form a low pass filter. Unless you need very high bandwidth, 10-100 kΩ will be good value for most cases.

Note also that this circuit does not isolate V1 and V2 from each other as a summing inverting amplifier would. Each sees the other with a impedance of R1+R2. Maybe that doesn't matter, but you need to at least think about it.

As for R3 and R4, you make them lower to support higher frequency, but not so low as to overload the output of the opamp or drain too much current. For example, if R3 and R4 are 1 kΩ each and the output often sits at 4 V, then this will eat up 2 mA of supply current. That is probably irrelevant if this is part of something like a TV, for example, that is plugged into wall power. However, 2 mA can make a significant difference in a battery operated device. I'd probably again use 10-100 kΩ for each of R3 and R4 unless there is a good reason not to.

What you need is a summing amplifier. The 2-input summing amplifier in the link you give is a specific example of the general form, and it may or may not be suitable for your needs.

The general form of the summing amplifier is an invaluable resource in the toolkit of an electronics engineer. The general circuit shown below can be solved using Kirchoff's Current Law and a horrible heap of algebra, but if you're happy to take my word for it, it all boils down to one simple equation and one condition which must be obeyed.

You can have as few or as many plus- and minus-inputs as you like, 3 each are shown here for illustration.

Each input contributes Vn * Rf / Rn to the output, where the Vp/Rp elements are all added to the output, and the Vm/Rm are all subtracted from the output.

There is one strict condition which must be obeyed to allow the math to simplify nicely to this result: the parallel sum of impedances at the inverting input must be precisely equal to the parallel sum of impedances at the non-inverting input. This is where Rc comes in, to balance Rf in the case that all the input resistors are the same value.

If you want to sum two voltages equally, and subtract a quarter of a third, with a circuit which has a 10k feedback resistor, then you want each summing input connected to the non-inverting input with a 10k resistor each, the subtracting input to the inverting input with a 40k resistor and 13k3 resistor from the inverting input to ground to balance the parallel impedances.

In your case, you have an input in the range -0.8V to +1.8V and want to add 0.8V and scale the result to fit the range of your ADC. You don't say what ADC range you need, but as an example I'll choose 5.0V, and assume that you have 5.0V available as a stable analogue reference for the added term.

Your signal input has a range of 2.6V and requires a gain of 5.0/2.6 = 1.92. Without the addition of an offset, the signal would be amplified to produce an output at the ADC of -1.54V to +3.46V. So to the output, you need to add an offset of 1.54V.

Using E24 series values, the gain of 1.92 can be achieved using 7k5/3k9, so Rf = 7k5 and Rp1 = 3k9. The offset of 1.54V can be added by connecting a stable 5.0V reference through Rp2 = 24k. (Vp2 * Rf / Rp2 = 5.0 * 7.5 / 24 = 1.56V which is correct to better than 1.5%). The parallel sum at the inverting input is 7k5 // 24k = 5k7 and the parallel sum at the non-inverting input is simply 10k. So we need to add a 13k3 resistance from the non-inverting input to ground to bring the parallel sum down to 5k7 to match the inverting input. 13k3 can be approximated with two 27k in parallel.

Hope that helps, and gives you a useful tool for future designs.

• Billy, I found a small, but critical mistake on your figure. The inverting node on the opamp should not be grounded. – user94161 Dec 10 '15 at 22:34
• What is Rc doing? It doesn't appear in the equation. – Transistor Dec 10 '15 at 22:56
• this schematic is completely wrong. grounding the inverting node and pushing a current through R_c (which as another comment says, is utterly useless there) will cause a voltage difference between the positive and negative terminals of the opamp, causing it to saturate. please refer to Olin's schematic for the correct schematic. – deadude Dec 11 '15 at 1:16

I realize this post is quite old, but for he sake of future searches: The best and most generic answer is here: http://electronicdesign.com/ideas-design/efficiently-design-op-amp-summer-circuit

There is a small modification on Billysugger's approach that makes it much easier to compute resistor values.