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I am currently doing a reverse engineering project of a board. I found this particular circuit for current limit detection for both +12V and GND by using a couple of INA193 (IC1 & IC3) and LM2903 (IC2A & IC2B) comparators. There are four BJT NPNs (T1A, T1B, T2A & T2B), which are used for inverting and buffering in the circuit.

The circuit is as seen below:

circuit

  1. Each of the outputs of the LM2903 are inverted using T2A and T2B.
  2. The emitter collector for both T2A and T2B are connected to the emitter collector of T1A and the base of T1B via a 10k resistor.

What is the function of the emitter collector of T1B being connected to the base of T1A?

I'm assuming it's for the OC_OUT output to be just a 'hair trigger' signal instead of a long pulse signal when there is an overcurrent event.

Edit: Just for context, I captured the schematic myself by studying the PCBA. I worded my initial question weirdly. Sorry for the confusion.

Edit 2: Changed emitter to collector.

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  • \$\begingroup\$ You need to check your transistor pin names. \$\endgroup\$
    – Andy aka
    Commented Oct 8 at 12:09
  • \$\begingroup\$ @Andyaka: You're right, I've edited the post. \$\endgroup\$
    – scvgoodtogo
    Commented Oct 8 at 12:17

2 Answers 2

Reset to default
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In the red rectangle there is an asymmetric latch:

enter image description here

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  • \$\begingroup\$ Your diagram makes it pretty clear, I can see it now. Thanks. \$\endgroup\$
    – scvgoodtogo
    Commented Oct 10 at 3:42
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I believe that the two transistors in the red rectangle function as a latch. The latch can be set by a voltage applied to the left transistor. However, to reset the latch, the circuit must be powered down.

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  • \$\begingroup\$ Thanks, that seems logical. In the event of an overcurrent (a short perhaps), the circuit could disable the whole board function until the next power cycle. \$\endgroup\$
    – scvgoodtogo
    Commented Oct 8 at 12:24

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