There appear to be three main areas of concern here:
- FET gate drive directly from an Arduino.
- Proximity of the solenoids to the switches.
- Unknown filtering on the 25V.
Gate Drive for FETs.
Main concern is turning the FETs off. The Arduino has to handle all the charge from \$C_{\text{gs}}\$ and \$C_{\text{gd}}\$ with the change of \$V_{\text{ds}}\$ as the FET turns off. It's doubtful the ATMega was designed for that, and the current pulses along with parasitic inductance could cause ground bounce. That could cause erratic behavior of the chip. It would be best to return the gate charge to the source of the FET much more directly rather than through the Arduino.
Resistance in the gate circuit is also a concern. R3 is 150 Ohms, I'm guessing \$R_{\text{drv}}\$ (inside the Arduino) is 50 Ohms, and \$R_g\$ (inside the IRF530) is ~ 7 Ohms. That's 207 Ohms total, which is too much to keep the FET from turning back on during turn off. When the FET turns off there is a dV/dt on \$V_{\text{ds}}\$, driven by the solenoid inductance (\$L_s\$). The rise time of \$V_{\text{ds}}\$ will be set by solenoid inductance acting with \$C_{\text{ds}}\$ of the FET. In this case \$L_s\$ is 1uH and \$C_{\text{ds}}\$ is 350pF, so the expected rise time to 25V of \$V_{\text{ds}}\$ would be 35nsec. Calculations following the guidelines shown here result in 3.2 volts appearing on the FET gate during turn off, which would be enough to turn the FET back on at least partially.
Both of these problems with the gate circuit could be solved by adding a pnp transistor to pull down the gate during turn off. Here is an example circuit to give you an idea.
This is an emitter follower pull down for the gate that effectively divides gate circuit resistance by transistor \$\beta\$.
Solenoid and FET Switch Proximity.
You say the solenoids are 2 or 3 feet away from the switches. That's a problem because there will be stray inductance in the cable. There could easily be 100 or 200 nH of parasitic inductance. If the catch diodes for the solenoids are directly around the solenoids, then the cable inductance will ring with \$C_{\text{ds}}\$ of the FET and will need to be damped with an RC snubber at the FET, or managed somehow.
This a distribution problem for the solenoid circuit. Loop area of the solenoid 25V and return path need to be greatly reduced. The cable could be shortend, or the cable could be twisted (one or two turns per inch would probably do it), to cut down cable inductance.
Filtering on the 25V.
No filtering is shown on the 25V, but there needs to be enough local capacitance to handle the solenoid switching currents. Can't say more than that without knowing more about the supply.