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I am trying Synopsys dc tool for synthesizing my design. I tried different operating frequencies and observed the design area. Normally area should increase with increasing operating frequency but in my case design area for 220 MHz is somewhat greater than the area at 240 MHz. How is it possible??

Combinational area for 240 MHz is greater than 220 MHz but non combinational area for 220 MHz is greater.

Thanks in advance!

PS: Design area doesn't include net area.

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  • \$\begingroup\$ How much greater is 'somewhat greater'? Synthesizers don't generate a perfect result, they just do lots of trial and error to get as good as they can over many iterations. I wouldn't be surprised to see a fair amount of variation with similar starting constraints. \$\endgroup\$ – Tim Jun 14 '13 at 19:23
  • \$\begingroup\$ @Tim Well area for 220 Mhz is only 1% more than that of 240 Mhz. But what I want to say is the synthesis tool works on some well defined algorithm and synthesis result is DETERMINISTIC. I have tried running synthesis multiple times with same starting constraints. It gives same results. \$\endgroup\$ – user25155 Jun 14 '13 at 19:57
  • \$\begingroup\$ Yes, the results are deterministic if you use the exact same constraints, but that doesn't mean anything once you change the constraints. It's like the 'butterfly effect'. Maybe in the first pass a buffer gets moved for the 240MHz case to make one path a little faster, and then this buffer displaces another buffer, and that displaces another gate, and then things don't fit together the exact same way anymore. If you had a perfect synthesizer that ran for infinity time, then yes the lower frequency requirement should be smaller, but that's not the case. \$\endgroup\$ – Tim Jun 14 '13 at 20:06
  • \$\begingroup\$ @Tim Yeah that seams legit. Can you explain the reason for more non combinational (sequential) area in 220 MHz than in 240 MHz. \$\endgroup\$ – user25155 Jun 14 '13 at 20:11
  • \$\begingroup\$ I wouldn't be too concerned about that, it just means that in the 220MHz case some flops were larger than others. If you're trying to drive a long wire quickly, you can either use a large powerful flop (high sequential area), or a smaller flop followed by a large buffer (high combinational area). The results are equivalent, and why one gets chosen vs. another depend on the minute vagaries of the cell library you are using. \$\endgroup\$ – Tim Jun 14 '13 at 20:23

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