I am trying Synopsys dc tool for synthesizing my design. I tried different operating frequencies and observed the design area. Normally area should increase with increasing operating frequency but in my case design area for 220 MHz is somewhat greater than the area at 240 MHz. How is it possible??
Combinational area for 240 MHz is greater than 220 MHz but non combinational area for 220 MHz is greater.
Thanks in advance!
PS: Design area doesn't include net area.