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I am in the need for a high-side load switch and came up with the following schematic. High-Side voltage levels and current vary between 5-12V / 2 A max. The high-side PMOS (SI5509DC) is rated for 20V V_DS and 12V V_GS and up to 4A.

A 10V Zener diode D1 and the voltage divider formed by R2 & R3 is meant to limit the PMOS Gate-Source voltage. Diode D2 at the output shunts negative going spikes due to inductive loads towards ground.

C1 controls the fall time when opening the switch. I have not yet found a way to make the turn-on behaviour a bit smoother.

The switch will be closed most of the time and switching frequency is not an issue. However, I need to have negative logic at the input to keept the switch open during bootup when the driving pin of the CPLD is tri-stated and pulled towards 3.3V by internal pull-ups.

schematic

simulate this circuit – Schematic created using CircuitLab

My Logic interface is 3.3V @ 20mA CMOS (MaxV CPLD). I need to make the thing as robust and compact as possible and would like to ask for advice and comments.

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As you note, the circuit as drawn switches "on" much more quickly than it switches "off".

If you wish to make it more symmetric, simply add a single resistor (say 100K) in series with M2 gate || C1. Note that, to save space, you could use a small SMT zener and a dual MOSFET. The 1N4148 is rated at only 200mA, and you might want to use something beefier such as a small SMT 1A Schottky rectifier (for example, a CDBA120) if you're switching heavy inductive loads.

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If your pins are high impedance during boot-up, is negative logic necessary? Couldn't you just use a pull-down on the output?

What I've used in the past, and it's been robust is: Power P-channel high side switch. 10 kOhm pull-up between P-channel gate and P-channel source. Signal N-channel drain connected to P-channel gate, source going to ground. N-channel gate connected to microcontroller. 10 kOhm pull-down between N-channel gate and ground.

With a suitably low-level signal N-channel, 3.3V control is not a problem. I use BS150.

You can make the pull-ups/downs weaker, but switching times will be slower, which may actually be a problem if the load is significant compared to the rating of the switch.

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  • \$\begingroup\$ The CPLD has internal pullups that are active during startup and programming of 5k-25k which besides being quite a span - is rather strong. In my unterstanding I would need someting around 1-2k to pull those down again, which would waste a lot of current. \$\endgroup\$ – Arne Jun 18 '13 at 6:25

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