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A SAR ADC resembles a negative feedback system. The comparator input is a summing node.The difference between the analog input and the DAC output is the error signal which is driven to zero by the loop.

In a basic feedback system, the error signal is near zero because the forward amplifier has high gain.

How can we think about the comparator and DAC as a high gain forward amplifier? If we can identify something similar to gain, it seems it would be proportional to the number of bit trials.

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  • \$\begingroup\$ I think the key word here is resembles. But I am interested is the answer. \$\endgroup\$ Commented Nov 28 at 3:53
  • \$\begingroup\$ @StainlessSteelRat if you're interested you could upvote so it gets more attention. \$\endgroup\$
    – DavidG25
    Commented Nov 28 at 4:45
  • \$\begingroup\$ Excellent question. How would you distinguish between the small-signal gain and the RMS gain of a comparator/quantizer? Also, this feedback system is a digital servo loop that always settles within an LSB. It is more of a binary search than actual feedback. But anyway, your answer lies within the comparator gain definition. DAC gain is assumed to be unity ideally. \$\endgroup\$
    – a360pilot
    Commented Nov 28 at 6:03
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    \$\begingroup\$ @a360pilot I think it has to do with the DAC and its bit depth. Shanti Pavan defines the gain of a quantizer in Understanding Delta Sigma... and I think I remember it was 1. \$\endgroup\$
    – DavidG25
    Commented Nov 28 at 6:22
  • \$\begingroup\$ @DavidG25 I tend to agree. With servo error as small as an MSB, the gain of the comparator can be modeled as the small-signal gain and can approach infinity, neglecting metastability and other second-order effects. Thus, you can think of the loop trying to minimize the error at the summing junction. What prevents this from happening? The quantization noise, of course! This is the same as the LSB-level oscillation around the target value. \$\endgroup\$
    – a360pilot
    Commented Nov 28 at 6:33

4 Answers 4

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I can imagine scenarios in which DAC output resembles the error signal of a linear servo. If the DAC has an output from 0V to +1V, and the ADC is searching the digital space for some value corresponding to +1V, then the bit trials might take the following sequence:

100000 → 110000 → 111000 → 111100 etc, corresponding to this DAC output:

enter image description here

That very much looks like a critically damped servo, following an exponential approach to the set-point, with time constant \$\tau \approx 63\% \times n\$, where \$n\$ is the number of bits. I'm not sure how you would characterise gain here.

In trials to find 668mV, the sequence could be:

100000 → 110000 → 101000 → 101100 → 101010 etc.:

enter image description here

This resembles an under-damped system, overshooting at every trial.

I don't have anything more quantitative to offer, I'm afraid. The discrete nature of the system thwarted my efforts. My intuition tells me that such behaviour cannot be characterised by a linear transfer function, because sometimes it is critically damped, other times it isn't, but I am far from certain about this.

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  • \$\begingroup\$ I think both of those waveforms are geometric series x[n]=0.5^n. The oscillating case is (-0.5)^n. Geometric series are the discrete version of exponentials and feedback amplifiers have exponential responses! A clue perhaps!? \$\endgroup\$
    – DavidG25
    Commented 2 days ago
  • \$\begingroup\$ @DavidG25 Yes, that makes perfect sense, I'll have to give it some thought. A good clue, thanks for that! \$\endgroup\$ Commented 2 days ago
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It is a type of feedback system - but serially in time, not 'all at once' as a conventional system is. There is no point in time when the loop is 'closed' -- it is sampled, clocked and then updated in cycles until all bits are resolved.

The comparator generates bits serially, MSB first. These drive a DAC which converts the (digital) bits back to an analog signal that is compared with the input.

However it is different from a conventional (e.g. opamp) feedback system in that once resolved, each bit cannot change; the 'gain' (in some sense) divides by 2 on each clock, and it terminates after the N bits are resolved.

The 'exponential' approach and the 'oscillatory' convergence above are not indicative of a feedback system, just a series of ever-increasing resolution quantized approximations to the result.

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  • \$\begingroup\$ Regarding the time aspect, continuous time feedback systems also have a delay if their bandwidth is limited. There are also discrete time feedback systems (e.g. delta-sigma ADC). \$\endgroup\$
    – DavidG25
    Commented Dec 5 at 16:34
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I agree with Voltage Spike's answer: the comparator and DAC in a SAR ADC is not very similar to a high gain forward amplifier in a traditional feedback system. It makes more sense to me as a binary search algorithm that is directed by the loop. Still, there are some uncanny similarities—for example, dividing the DAC output by 2 would make the "closed loop gain" of the SAR ADC equal to 2 or the inverse of the "feedback factor".

One analogy I can attempt to make would be based on the error signal at the summing node which is minimized in both the traditional and SAR case. In a traditional feedback system with unity feedback the error signal is $$|x_{e}| = x_{in}/(1 + A)$$ In a SAR ADC the residual signal is $$|x_{e,SAR}| \le LSB/2 = V_{supply}/2^{N+1}$$ where \$N\$ is the bit depth of the DAC.

Crudely equating these and solving for \$A\$ gives $$x_{in}/(1 + A) = V_{supply}/2^{N+1}$$ $$A = 2^{N+1} \frac{x_{in}}{V_{supply}} - 1$$

Another attempt could take the approach of linearizing the system by representing the quantization error as an additive noise source. I might work through this later.

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How can we think about the comparator and DAC as a high gain forward amplifier?

Not in many ways. The only commonality they have is sensitivity to small signals and driving the output of the input terminals to zero when in negativefeedback. Other than that the similarity ends.

A high gain amplifier needs to be linear to be able to amplify a signal. A SAR comparator does not need to amplify or be linear. The only thing a comparator needs to do is tell you if one terminal is higher or lower. Comparators also generally have a lower gain, because they are designed to be fast and have a smaller delay and change the output as fast as possible.

The DAC has the same dynamic range as the comparator input, and the S/H input and output also has the same dynamic range, so there really isn't any 'gain' in a SAR, other than the comparator's open loop gain.

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  • \$\begingroup\$ Dynamic range does not have to be different for there to be gain—an op amp is an example of that. \$\endgroup\$
    – DavidG25
    Commented Dec 9 at 16:26
  • \$\begingroup\$ What I meant was the signals are not being gained in any way, other than the comparator open loop gain. \$\endgroup\$
    – Voltage Spike
    Commented Dec 9 at 18:48

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