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I am currently working on improving and correcting the hardware design of two of my company's products. One is a small board measuring 55.499 x 31.369 mm, based on an ESP32-PICO D4() and an STM32G070, both operating at 3.3V. It includes a pair of 12V output relays. The previous design follows the following format:

Layer 1 (TOP): Components, signals, and a GND polygon all over the layer.

Layer 2 (Signal 1): Some signal traces and the rest covered by a 3.3V plane.

Layer 3 (Signal 2): Some signal traces and the rest covered by a GND plane.

Layer 4 (BOTTOM): Few signal traces and the rest covered by a GND plane.

The other board is slightly larger, measuring 148.717 mm x 76.708 mm, with an ESP32 WROOM module, STM32G070, a 4G module, 4 output relays, and Wiegand and RS-485 output communication. It follows the following configuration:

Layer 1 (TOP): Components, signals, and a GND polygon all over the layer.

Layer 2 (Signal 1): Some signal traces and the rest covered by a 3.3V plane.

Layer 3 (Signal 2): Some signal traces and the rest covered by a GND plane.

Layer 4 (BOTTOM): Few signal traces and the rest covered by a 3.3V plane.

Both boards have serial output and SWI (STM32 only) for debugging and code loading.

The designs come with many errors and issues, which leads me to question whether the choice of format is the most appropriate. Therefore, I would appreciate it if a more experienced hardware designer could provide their opinion.

Thank you.

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    \$\begingroup\$ Unless the signal traces in those 'gnd' layers are very very short, or the gnds have been stitched together with great attention to detail, you do not have 'gnd planes', you have a difficult to verify mess. What signal frequencies are involved? Are the boards passing EMI tests? \$\endgroup\$
    – Neil_UK
    Commented Nov 29 at 14:13
  • \$\begingroup\$ By format, do you mean stack-up or physical dimensions? \$\endgroup\$
    – winny
    Commented Nov 29 at 14:16
  • \$\begingroup\$ Do you even need 4 layers? The way how you use the planes depends on what signals you run there, i.e. how fast they are, are they differential, is there RF antenna etc involved. It sounds like each layer has some planes and some signals mixed here and there, it might work for some signals but not for some other signals, and you don't describe what signals there are. \$\endgroup\$
    – Justme
    Commented Nov 29 at 14:29
  • \$\begingroup\$ OP should answer "What signal frequencies are involved?" (and corresponding required rise-times). However, it sounds to me like this is an electromechanical relay control board (with typical slow signals), so it's likely that issues due to layer mismanagement is likely a red herring. Perhaps you should post some schematic snippets of the problem areas? \$\endgroup\$
    – Chris Knudsen
    Commented Nov 29 at 14:43
  • \$\begingroup\$ If you haven't done so, I recommend watching How to Achieve Proper Grounding by Rick Hartley. It is a gold mine of information regarding signal returns, stack ups, and avoiding EMI and coupling problems. Routing layers are discussed from 49:56 to 1:03:52. \$\endgroup\$
    – C. Dunn
    Commented Dec 2 at 23:28

3 Answers 3

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Use power tracks rather than power plane, use signal and 3.3V tracks on the same plane and use a solid ground beneath them on the second layer. I am suggesting two different 4-layer stack-ups you can use.

Stack-up 1:

  • signal/power(Top layer)
  • GND(2nd layer)
  • GND(3rd layer)
  • signal/power(4th layer)

Stack-up 2:

  • signal/power(Top layer)
  • GND(2nd layer)
  • signal/power(3rd layer)
  • GND(4th layer)

You can use GND pour on 1st and 4th layer if needed. If there is a dc dc converter keep it away from rest of the sensitive circuitry.

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As you have 4 layers to play with, and have already afforded the luxury of power planes, I would strongly recommend that you dedicate one layer to an unbroken ground. No tracks through it at all. It will of course need to have small holes in it for via clearance, but make sure these holes don't line up together to form a linear break. This unbroken ground plane forms the foundation of all your power decoupling, and control of signal return currents.

Generally power planes are not needed. Treat power tracks as you would signal tracks, and then you have three layers to route them all on. If there isn't interference between ICs on the same power supply, then that's no problem. If there is, it's easier to deal with by paying attention to decoupling discrete tracks than a plane.

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  • \$\begingroup\$ not a fan of only one reference plane layer in a 4 layer stack-up. Say if L2 is Gnd, one has to extremely careful with the routing of L3 and L4, because they could very easily couple into eachother. \$\endgroup\$
    – tobalt
    Commented Nov 29 at 15:54
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Neither of the two boards has a solid, unbroken GND plane. This is a strong indication that someone did not know what they were doing.

Broken GND planes do not necessarily lead to issues (signal integrity and/or EMC). But there are stack-up configurations that are much less prone to causing problems.

Unless there are strong, compelling reasons to do otherwise, my default stack-up for 4-layer boards is this one:

  • 1 Sig/Pwr/Components
  • 2 GND plane
  • 3 GND plane
  • 4 Sig/Pwr
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